From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:51369 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758232AbcEFRlK (ORCPT ); Fri, 6 May 2016 13:41:10 -0400 Subject: Patch "clk: qcom: msm8960: fix ce3_core clk enable register" has been added to the 4.4-stable tree To: srinivas.kandagatla@linaro.org, gregkh@linuxfoundation.org, sboyd@codeaurora.org Cc: , From: Date: Fri, 06 May 2016 12:32:48 -0400 Message-ID: <1462552368111148@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled clk: qcom: msm8960: fix ce3_core clk enable register to the 4.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch and it can be found in the queue-4.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 732d6913691848db9fabaa6a25b4d6fad10ddccf Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Mon, 22 Feb 2016 11:43:39 +0000 Subject: clk: qcom: msm8960: fix ce3_core clk enable register From: Srinivas Kandagatla commit 732d6913691848db9fabaa6a25b4d6fad10ddccf upstream. This patch corrects the enable register offset which is actually 0x36cc instead of 0x36c4 Signed-off-by: Srinivas Kandagatla Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control") Signed-off-by: Stephen Boyd Signed-off-by: Greg Kroah-Hartman --- drivers/clk/qcom/gcc-msm8960.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/clk/qcom/gcc-msm8960.c +++ b/drivers/clk/qcom/gcc-msm8960.c @@ -2769,7 +2769,7 @@ static struct clk_branch ce3_core_clk = .halt_reg = 0x2fdc, .halt_bit = 5, .clkr = { - .enable_reg = 0x36c4, + .enable_reg = 0x36cc, .enable_mask = BIT(4), .hw.init = &(struct clk_init_data){ .name = "ce3_core_clk", Patches currently in stable-queue which might be from srinivas.kandagatla@linaro.org are queue-4.4/clk-qcom-msm8960-fix-ce3_src-register-offset.patch queue-4.4/clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch