From: jon.mason@broadcom.com (Jon Mason)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support
Date: Wed, 11 May 2016 18:56:09 -0400 [thread overview]
Message-ID: <1463007369-13071-2-git-send-email-jonmason@broadcom.com> (raw)
In-Reply-To: <1463007369-13071-1-git-send-email-jonmason@broadcom.com>
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index c77a9e8..d1dc812 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -279,6 +279,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ cci at 65590000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x65590000 0x1000>;
+ ranges = <0 0x65590000 0x10000>;
+
+ pmu at 9000 {
+ compatible = "arm,cci-400-pmu,r1",
+ "arm,cci-400-pmu";
+ reg = <0x9000 0x4000>;
+ interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
timer0: timer at 66030000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66030000 0x1000>;
--
1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Jon Mason <jon.mason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
To: Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support
Date: Wed, 11 May 2016 18:56:09 -0400 [thread overview]
Message-ID: <1463007369-13071-2-git-send-email-jonmason@broadcom.com> (raw)
In-Reply-To: <1463007369-13071-1-git-send-email-jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.
Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index c77a9e8..d1dc812 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -279,6 +279,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ cci@65590000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x65590000 0x1000>;
+ ranges = <0 0x65590000 0x10000>;
+
+ pmu@9000 {
+ compatible = "arm,cci-400-pmu,r1",
+ "arm,cci-400-pmu";
+ reg = <0x9000 0x4000>;
+ interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
timer0: timer@66030000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66030000 0x1000>;
--
1.9.1
--
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WARNING: multiple messages have this Message-ID (diff)
From: Jon Mason <jon.mason@broadcom.com>
To: Florian Fainelli <f.fainelli@gmail.com>,
Ray Jui <rjui@broadcom.com>,
Scott Branden <sbranden@broadcom.com>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: bcm-kernel-feedback-list@broadcom.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support
Date: Wed, 11 May 2016 18:56:09 -0400 [thread overview]
Message-ID: <1463007369-13071-2-git-send-email-jonmason@broadcom.com> (raw)
In-Reply-To: <1463007369-13071-1-git-send-email-jonmason@broadcom.com>
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index c77a9e8..d1dc812 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -279,6 +279,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ cci@65590000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x65590000 0x1000>;
+ ranges = <0 0x65590000 0x10000>;
+
+ pmu@9000 {
+ compatible = "arm,cci-400-pmu,r1",
+ "arm,cci-400-pmu";
+ reg = <0x9000 0x4000>;
+ interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
timer0: timer@66030000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66030000 0x1000>;
--
1.9.1
next prev parent reply other threads:[~2016-05-11 22:56 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-11 22:56 [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Jon Mason
2016-05-11 22:56 ` Jon Mason
2016-05-11 22:56 ` Jon Mason
2016-05-11 22:56 ` Jon Mason [this message]
2016-05-11 22:56 ` [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support Jon Mason
2016-05-11 22:56 ` Jon Mason
2016-05-20 18:45 ` Florian Fainelli
2016-05-20 18:45 ` Florian Fainelli
2016-05-20 18:45 ` Florian Fainelli
2016-05-12 6:16 ` [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang
2016-05-12 6:16 ` Kefeng Wang
2016-05-12 6:16 ` Kefeng Wang
2016-05-12 14:46 ` Jon Mason
2016-05-12 16:52 ` Ray Jui
2016-05-12 16:52 ` Ray Jui
2016-05-13 1:17 ` Kefeng Wang
2016-05-13 1:17 ` Kefeng Wang
2016-05-13 1:17 ` Kefeng Wang
2016-05-13 2:09 ` Kefeng Wang
2016-05-13 2:09 ` Kefeng Wang
2016-05-13 2:09 ` Kefeng Wang
2016-05-13 16:49 ` Jon Mason
2016-05-16 1:11 ` Kefeng Wang
2016-05-16 1:11 ` Kefeng Wang
2016-05-16 1:11 ` Kefeng Wang
2016-05-17 19:56 ` Florian Fainelli
2016-05-17 19:56 ` Florian Fainelli
2016-05-17 19:56 ` Florian Fainelli
2016-05-18 5:50 ` Kefeng Wang
2016-05-18 5:50 ` Kefeng Wang
2016-05-18 5:50 ` Kefeng Wang
2016-05-20 18:45 ` Florian Fainelli
2016-05-20 18:45 ` Florian Fainelli
2016-05-20 18:45 ` Florian Fainelli
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