From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out2-smtp.messagingengine.com ([66.111.4.26]:34009 "EHLO out2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750787AbcFDUjj (ORCPT ); Sat, 4 Jun 2016 16:39:39 -0400 Subject: FAILED: patch "[PATCH] drm/amdgpu: hdp flush&inval should always do" failed to apply to 4.6-stable tree To: Monk.Liu@amd.com, David1.Zhou@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com Cc: From: Date: Sat, 04 Jun 2016 13:39:36 -0700 Message-ID: <14650727766232@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: The patch below does not apply to the 4.6-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . thanks, greg k-h ------------------ original commit in Linus's tree ------------------ >>From 794ff5710eb1d8bea4acc79cd005f6342623ec46 Mon Sep 17 00:00:00 2001 From: Monk Liu Date: Wed, 4 May 2016 16:27:41 +0800 Subject: [PATCH] drm/amdgpu: hdp flush&inval should always do MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes Tonga vm-fault issue when running disaster (a multiple context GL heavy tests), We should always flush & invalidate hdp no matter vm used or not. Signed-off-by: Monk Liu Reviewed-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index 0ed643036361..89f33d5e8731 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c @@ -163,11 +163,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, amdgpu_ring_undo(ring); return r; } - - if (ring->funcs->emit_hdp_flush) - amdgpu_ring_emit_hdp_flush(ring); } + if (ring->funcs->emit_hdp_flush) + amdgpu_ring_emit_hdp_flush(ring); + /* always set cond_exec_polling to CONTINUE */ *ring->cond_exe_cpu_addr = 1; @@ -178,10 +178,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, ring->current_ctx = ctx; } - if (vm) { - if (ring->funcs->emit_hdp_invalidate) - amdgpu_ring_emit_hdp_invalidate(ring); - } + if (ring->funcs->emit_hdp_invalidate) + amdgpu_ring_emit_hdp_invalidate(ring); r = amdgpu_fence_emit(ring, &hwf); if (r) {