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From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, Zhi Wang <zhi.a.wang@intel.com>
Cc: intel-gfx@lists.freedesktop.org, zhiyuan.lv@intel.com
Subject: Re: [PATCH v7 07/11] drm/i915: Make ring buffer size of a LRC context configurable
Date: Wed, 08 Jun 2016 11:34:34 +0300	[thread overview]
Message-ID: <1465374874.5803.20.camel@linux.intel.com> (raw)
In-Reply-To: <20160608070849.GE32344@nuc-i3427.alporthouse.com>

On ke, 2016-06-08 at 08:08 +0100, Chris Wilson wrote:
> On Tue, Jun 07, 2016 at 11:18:43AM -0400, Zhi Wang wrote:
> > 
> > This patch introduces an option for configuring the ring buffer size
> > of a LRC context after the context creation.
> > 
> > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h         | 1 +
> >  drivers/gpu/drm/i915/i915_gem_context.c | 1 +
> >  drivers/gpu/drm/i915/intel_lrc.c        | 3 ++-
> >  3 files changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 33147b1..50b3ea7 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -878,6 +878,7 @@ struct i915_gem_context {
> >  		int pin_count;
> >  		bool initialised;
> >  	} engine[I915_NUM_ENGINES];
> > +	u32 lrc_ring_buffer_size;
> u32 ring_size;
> 

My Reviewed-by: can be kept with that change.

Regards, Joonas

> There is no reason why we need to limit it to lrc other than immediate
> convenience.
> -Chris
> 
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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  reply	other threads:[~2016-06-08  8:34 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-07 15:18 [PATCH v7 00/11] Introduce the implementation of GVT context Zhi Wang
2016-06-07 15:18 ` [PATCH v7 01/11] drm/i915: Factor out i915_pvinfo.h Zhi Wang
2016-06-08  7:55   ` Joonas Lahtinen
2016-06-08  8:20     ` Wang, Zhi A
2016-06-07 15:18 ` [PATCH v7 02/11] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page Zhi Wang
2016-06-08  7:57   ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 03/11] drm/i915: Fold vGPU active check into inner functions Zhi Wang
2016-06-08  8:04   ` Joonas Lahtinen
2016-06-08  8:06     ` Wang, Zhi A
2016-06-07 15:18 ` [PATCH v7 04/11] drm/i915: Add teardown path in intel_vgt_ballon() Zhi Wang
2016-06-08  8:12   ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 05/11] drm/i915: gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-06-08  8:28   ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 06/11] drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang
2016-06-07 15:18 ` [PATCH v7 07/11] drm/i915: Make ring buffer size of a LRC context configurable Zhi Wang
2016-06-08  7:08   ` Chris Wilson
2016-06-08  8:34     ` Joonas Lahtinen [this message]
2016-06-07 15:18 ` [PATCH v7 08/11] drm/i915: Make addressing mode bits in context descriptor configurable Zhi Wang
2016-06-08  7:12   ` Chris Wilson
2016-06-08  8:17     ` Wang, Zhi A
2016-06-08  8:38   ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 09/11] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-06-07 22:01   ` Chris Wilson
2016-06-08  8:40     ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 10/11] drm/i915: Support LRC context single submission Zhi Wang
2016-06-08  7:04   ` Chris Wilson
2016-06-08  8:44     ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 11/11] drm/i915: Introduce GVT context creation API Zhi Wang
2016-06-08  6:59   ` Chris Wilson
2016-06-07 15:53 ` ✓ Ro.CI.BAT: success for Introduce the implementation of GVT context (rev5) Patchwork

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