diff for duplicates of <1465424554.17932.14.camel@neuling.org> diff --git a/a/1.txt b/N1/1.txt index 1ffd780..a50ad50 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,40 +1,32 @@ On Wed, 2016-06-08 at 22:31 +0530, Shreyas B Prabhu wrote: > Hi Ben, ->=20 +> > Sorry for the delayed response. ->=20 +> > On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote: -> >=20 +> > > > On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote: -> > >=20 +> > > > > > @@ -61,8 +72,13 @@ save_sprs_to_stack: -> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* Note all regi= -ster i.e per-core, per-subcore or per-thread +> > > * Note all register i.e per-core, per-subcore or per-thread > > > is saved -> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* here since an= -y thread in the core might wake up first -> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0*/ +> > > * here since any thread in the core might wake up first +> > > */ > > > +BEGIN_FTR_SECTION -> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mfspr=C2=A0=C2=A0=C2=A0r3,= -SPRN_PTCR -> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0std=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0r3,_PTCR(r1) +> > > + mfspr r3,SPRN_PTCR +> > > + std r3,_PTCR(r1) > > > +FTR_SECTION_ELSE -> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mfspr=C2=A0=C2=A0=C2= -=A0r3,SPRN_SDR1 -> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0std=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0r3,_SDR1(r1) +> > > mfspr r3,SPRN_SDR1 +> > > std r3,_SDR1(r1) > > > +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) > > This is the only new SPR we care about in P9 ? -> >=20 +> > > After reviewing ISA again, I've identified LMRR, LMSER and ASDR also > need to be restored. I've fixed this in v6. -LMRR and LMSER are used the load monitored patch set. =C2=A0There they will= - get -restored when we context switch back to userspace. =C2=A0It probably doesn'= -t -hurt that much but you don't need to restore them here.=C2=A0 +LMRR and LMSER are used the load monitored patch set. There they will get +restored when we context switch back to userspace. It probably doesn't +hurt that much but you don't need to restore them here. They are not used in the kernel. diff --git a/a/content_digest b/N1/content_digest index 8bdfdae..be79db1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -16,41 +16,33 @@ "b\0" "On Wed, 2016-06-08 at 22:31 +0530, Shreyas B Prabhu wrote:\n" "> Hi Ben,\n" - ">=20\n" + "> \n" "> Sorry for the delayed response.\n" - ">=20\n" + "> \n" "> On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote:\n" - "> >=20\n" + "> > \n" "> > On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:\n" - "> > >=20\n" + "> > > \n" "> > > @@ -61,8 +72,13 @@ save_sprs_to_stack:\n" - "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* Note all regi=\n" - "ster i.e per-core, per-subcore or per-thread\n" + "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240* Note all register i.e per-core, per-subcore or per-thread\n" "> > > is saved\n" - "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* here since an=\n" - "y thread in the core might wake up first\n" - "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0*/\n" + "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240* here since any thread in the core might wake up first\n" + "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240*/\n" "> > > +BEGIN_FTR_SECTION\n" - "> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mfspr=C2=A0=C2=A0=C2=A0r3,=\n" - "SPRN_PTCR\n" - "> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0std=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0r3,_PTCR(r1)\n" + "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240mfspr\302\240\302\240\302\240r3,SPRN_PTCR\n" + "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240std\302\240\302\240\302\240\302\240\302\240r3,_PTCR(r1)\n" "> > > +FTR_SECTION_ELSE\n" - "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mfspr=C2=A0=C2=A0=C2=\n" - "=A0r3,SPRN_SDR1\n" - "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0std=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0r3,_SDR1(r1)\n" + "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240mfspr\302\240\302\240\302\240r3,SPRN_SDR1\n" + "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240std\302\240\302\240\302\240\302\240\302\240r3,_SDR1(r1)\n" "> > > +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)\n" "> > This is the only new SPR we care about in P9 ?\n" - "> >=20\n" + "> > \n" "> After reviewing ISA again, I've identified LMRR, LMSER and ASDR also\n" "> need to be restored. I've fixed this in v6.\n" "\n" - "LMRR and LMSER are used the load monitored patch set. =C2=A0There they will=\n" - " get\n" - "restored when we context switch back to userspace. =C2=A0It probably doesn'=\n" - "t\n" - "hurt that much but you don't need to restore them here.=C2=A0\n" + "LMRR and LMSER are used the load monitored patch set. \302\240There they will get\n" + "restored when we context switch back to userspace. \302\240It probably doesn't\n" + "hurt that much but you don't need to restore them here.\302\240\n" "\n" "They are not used in the kernel.\n" "\n" @@ -58,4 +50,4 @@ "\n" Mikey -9b7dc179fcc5609cadc085c77d68bd1fe67c6e803bc8476caac031d6f6ba857f +21752af52ef4a59ef7aeac6b787aec7fba596f8b0933ff8610c420f5e2dfcf22
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