From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/8] drm/i915: Tidy up flush cpu/gtt write domains
Date: Thu, 09 Jun 2016 16:12:02 +0300 [thread overview]
Message-ID: <1465477922.9670.33.camel@linux.intel.com> (raw)
In-Reply-To: <1465471779-20765-8-git-send-email-chris@chris-wilson.co.uk>
On to, 2016-06-09 at 12:29 +0100, Chris Wilson wrote:
> Since we know the write domain, we can drop the local variable and make
> the code look a tiny bit simpler.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 15 ++++-----------
> 1 file changed, 4 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 8c90b6a12d45..45f878350d66 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2913,7 +2913,6 @@ static void
> i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
> {
> struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
> - uint32_t old_write_domain;
>
> if (obj->base.write_domain != I915_GEM_DOMAIN_GTT)
> return;
> @@ -2937,36 +2936,30 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
> if (INTEL_INFO(dev_priv)->gen >= 6 && !HAS_LLC(dev_priv))
> POSTING_READ(RING_ACTHD(dev_priv->engine[RCS].mmio_base));
>
> - old_write_domain = obj->base.write_domain;
> - obj->base.write_domain = 0;
> -
> intel_fb_obj_flush(obj, false, ORIGIN_GTT);
>
> + obj->base.write_domain = 0;
> trace_i915_gem_object_change_domain(obj,
> obj->base.read_domains,
> - old_write_domain);
> + I915_GEM_DOMAIN_GTT);
> }
>
> /** Flushes the CPU write domain for the object if it's dirty. */
> static void
> i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj)
> {
> - uint32_t old_write_domain;
> -
> if (obj->base.write_domain != I915_GEM_DOMAIN_CPU)
> return;
>
> if (i915_gem_clflush_object(obj, obj->pin_display))
> i915_gem_chipset_flush(to_i915(obj->base.dev));
>
> - old_write_domain = obj->base.write_domain;
> - obj->base.write_domain = 0;
> -
> intel_fb_obj_flush(obj, false, ORIGIN_CPU);
>
> + obj->base.write_domain = 0;
> trace_i915_gem_object_change_domain(obj,
> obj->base.read_domains,
> - old_write_domain);
> + I915_GEM_DOMAIN_CPU);
> }
>
> /**
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2016-06-09 13:12 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-09 11:29 Start tidying up execbuf relocations Chris Wilson
2016-06-09 11:29 ` [PATCH 1/8] drm/i915: Print the batchbuffer offset next to BBADDR in error state Chris Wilson
2016-06-09 12:29 ` Joonas Lahtinen
2016-06-09 11:29 ` [PATCH 2/8] drm/i915: Cache kmap between relocations Chris Wilson
2016-06-09 12:25 ` Joonas Lahtinen
2016-06-09 11:29 ` [PATCH 3/8] drm/i915: Extract i915_gem_obj_prepare_shmem_write() Chris Wilson
2016-06-09 11:39 ` Chris Wilson
2016-06-09 12:47 ` Joonas Lahtinen
2016-06-09 11:29 ` [PATCH 4/8] drm/i915: Before accessing an object via the cpu, flush GTT writes Chris Wilson
2016-06-09 12:50 ` Joonas Lahtinen
2016-06-09 11:29 ` [PATCH 5/8] drm/i915: Wait for writes through the GTT to land before reading back Chris Wilson
2016-06-09 11:36 ` Chris Wilson
2016-06-09 12:54 ` Joonas Lahtinen
2016-06-09 11:29 ` [PATCH 6/8] drm/i915: Pin the pages first in shmem prepare read/write Chris Wilson
2016-06-09 13:06 ` Joonas Lahtinen
2016-06-09 13:35 ` Chris Wilson
2016-06-09 13:51 ` Joonas Lahtinen
2016-06-09 14:13 ` Chris Wilson
2016-06-09 11:29 ` [PATCH 7/8] drm/i915: Tidy up flush cpu/gtt write domains Chris Wilson
2016-06-09 13:12 ` Joonas Lahtinen [this message]
2016-06-09 11:29 ` [PATCH 8/8] drm/i915: Refactor execbuffer relocation writing Chris Wilson
2016-06-09 13:31 ` Joonas Lahtinen
2016-06-09 14:22 ` Chris Wilson
2016-06-09 11:40 ` ✗ Ro.CI.BAT: failure for series starting with [1/8] drm/i915: Print the batchbuffer offset next to BBADDR in error state Patchwork
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