diff for duplicates of <1467139845-29753-5-git-send-email-ttnguyen@apm.com> diff --git a/a/1.txt b/N1/1.txt index 183d2c6..a001625 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -11,7 +11,7 @@ index fe30f76..62806e0 100644 }; }; -+ pmu: pmu at 78810000 { ++ pmu: pmu@78810000 { + compatible = "apm,xgene-pmu-v2"; + #address-cells = <2>; + #size-cells = <2>; @@ -22,54 +22,54 @@ index fe30f76..62806e0 100644 + reg = <0x0 0x78810000 0x0 0x1000>; + interrupts = <0x0 0x22 0x4>; + -+ pmul3c at 7e610000 { ++ pmul3c@7e610000 { + compatible = "apm,xgene-pmu-l3c"; + reg = <0x0 0x7e610000 0x0 0x1000>; + }; + -+ pmuiob at 7e940000 { ++ pmuiob@7e940000 { + compatible = "apm,xgene-pmu-iob"; + reg = <0x0 0x7e940000 0x0 0x1000>; + }; + -+ pmucmcb at 7e710000 { ++ pmucmcb@7e710000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e710000 0x0 0x1000>; + enable-bit-index = <0>; + }; + -+ pmucmcb at 7e730000 { ++ pmucmcb@7e730000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e730000 0x0 0x1000>; + enable-bit-index = <1>; + }; + -+ pmucmc at 7e810000 { ++ pmucmc@7e810000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e810000 0x0 0x1000>; + enable-bit-index = <0>; + }; + -+ pmucmc at 7e850000 { ++ pmucmc@7e850000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e850000 0x0 0x1000>; + enable-bit-index = <1>; + }; + -+ pmucmc at 7e890000 { ++ pmucmc@7e890000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e890000 0x0 0x1000>; + enable-bit-index = <2>; + }; + -+ pmucmc at 7e8d0000 { ++ pmucmc@7e8d0000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e8d0000 0x0 0x1000>; + enable-bit-index = <3>; + }; + }; + - pcie0: pcie at 1f2b0000 { + pcie0: pcie@1f2b0000 { status = "disabled"; device_type = "pci"; -- diff --git a/a/content_digest b/N1/content_digest index 8524c57..7e85fc4 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,15 @@ "ref\01467139845-29753-1-git-send-email-ttnguyen@apm.com\0" - "From\0ttnguyen@apm.com (Tai Nguyen)\0" + "From\0Tai Nguyen <ttnguyen@apm.com>\0" "Subject\0[PATCH v6 4/4] arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries\0" "Date\0Tue, 28 Jun 2016 11:50:45 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0mark.rutland@arm.com" + will.deacon@arm.com + " catalin.marinas@arm.com\0" + "Cc\0linux-kernel@vger.kernel.org" + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + patches@apm.com + " Tai Nguyen <ttnguyen@apm.com>\0" "\00:1\0" "b\0" "Signed-off-by: Tai Nguyen <ttnguyen@apm.com>\n" @@ -18,7 +25,7 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "+\t\tpmu: pmu at 78810000 {\n" + "+\t\tpmu: pmu@78810000 {\n" "+\t\t\tcompatible = \"apm,xgene-pmu-v2\";\n" "+\t\t\t#address-cells = <2>;\n" "+\t\t\t#size-cells = <2>;\n" @@ -29,57 +36,57 @@ "+\t\t\treg = <0x0 0x78810000 0x0 0x1000>;\n" "+\t\t\tinterrupts = <0x0 0x22 0x4>;\n" "+\n" - "+\t\t\tpmul3c at 7e610000 {\n" + "+\t\t\tpmul3c@7e610000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-l3c\";\n" "+\t\t\t\treg = <0x0 0x7e610000 0x0 0x1000>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmuiob at 7e940000 {\n" + "+\t\t\tpmuiob@7e940000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-iob\";\n" "+\t\t\t\treg = <0x0 0x7e940000 0x0 0x1000>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmucmcb at 7e710000 {\n" + "+\t\t\tpmucmcb@7e710000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-mcb\";\n" "+\t\t\t\treg = <0x0 0x7e710000 0x0 0x1000>;\n" "+\t\t\t\tenable-bit-index = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmucmcb at 7e730000 {\n" + "+\t\t\tpmucmcb@7e730000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-mcb\";\n" "+\t\t\t\treg = <0x0 0x7e730000 0x0 0x1000>;\n" "+\t\t\t\tenable-bit-index = <1>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmucmc at 7e810000 {\n" + "+\t\t\tpmucmc@7e810000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-mc\";\n" "+\t\t\t\treg = <0x0 0x7e810000 0x0 0x1000>;\n" "+\t\t\t\tenable-bit-index = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmucmc at 7e850000 {\n" + "+\t\t\tpmucmc@7e850000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-mc\";\n" "+\t\t\t\treg = <0x0 0x7e850000 0x0 0x1000>;\n" "+\t\t\t\tenable-bit-index = <1>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmucmc at 7e890000 {\n" + "+\t\t\tpmucmc@7e890000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-mc\";\n" "+\t\t\t\treg = <0x0 0x7e890000 0x0 0x1000>;\n" "+\t\t\t\tenable-bit-index = <2>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tpmucmc at 7e8d0000 {\n" + "+\t\t\tpmucmc@7e8d0000 {\n" "+\t\t\t\tcompatible = \"apm,xgene-pmu-mc\";\n" "+\t\t\t\treg = <0x0 0x7e8d0000 0x0 0x1000>;\n" "+\t\t\t\tenable-bit-index = <3>;\n" "+\t\t\t};\n" "+\t\t};\n" "+\n" - " \t\tpcie0: pcie at 1f2b0000 {\n" + " \t\tpcie0: pcie@1f2b0000 {\n" " \t\t\tstatus = \"disabled\";\n" " \t\t\tdevice_type = \"pci\";\n" "-- \n" 1.9.1 -f00305d58e44ab07d46953a948509d703a8db6df9848e815c5e9becd940f20b1 +7b74a1bb40791d7c4367b114d553cbac4e55820a5d74c72c020364b50b5c746a
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