From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53819) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bJ1sV-0002c6-U0 for qemu-devel@nongnu.org; Fri, 01 Jul 2016 13:05:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bJ1sT-0005Wh-Mx for qemu-devel@nongnu.org; Fri, 01 Jul 2016 13:05:18 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:35862) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bJ1sT-0005WR-Cn for qemu-devel@nongnu.org; Fri, 01 Jul 2016 13:05:17 -0400 Received: by mail-pf0-x244.google.com with SMTP id i123so10452864pfg.3 for ; Fri, 01 Jul 2016 10:05:17 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Fri, 1 Jul 2016 10:04:51 -0700 Message-Id: <1467392693-22715-26-git-send-email-rth@twiddle.net> In-Reply-To: <1467392693-22715-1-git-send-email-rth@twiddle.net> References: <1467392693-22715-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 25/27] linux-user: remove handling of ARM's EXCP_STREX List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: cota@braap.org, alex.bennee@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, serge.fdrv@gmail.com From: "Emilio G. Cota" The exception is not emitted anymore. Signed-off-by: Emilio G. Cota Message-Id: <1467054136-10430-29-git-send-email-cota@braap.org> --- linux-user/main.c | 93 ------------------------------------------------------- 1 file changed, 93 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 54df300..f4fc460 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -648,94 +648,6 @@ do_kernel_trap(CPUARMState *env) return 0; } -/* Store exclusive handling for AArch32 */ -static int do_strex(CPUARMState *env) -{ - uint64_t val; - int size; - int rc = 1; - int segv = 0; - uint32_t addr; - start_exclusive(); - if (env->exclusive_addr != env->exclusive_test) { - goto fail; - } - /* We know we're always AArch32 so the address is in uint32_t range - * unless it was the -1 exclusive-monitor-lost value (which won't - * match exclusive_test above). - */ - assert(extract64(env->exclusive_addr, 32, 32) == 0); - addr = env->exclusive_addr; - size = env->exclusive_info & 0xf; - switch (size) { - case 0: - segv = get_user_u8(val, addr); - break; - case 1: - segv = get_user_data_u16(val, addr, env); - break; - case 2: - case 3: - segv = get_user_data_u32(val, addr, env); - break; - default: - abort(); - } - if (segv) { - env->exception.vaddress = addr; - goto done; - } - if (size == 3) { - uint32_t valhi; - segv = get_user_data_u32(valhi, addr + 4, env); - if (segv) { - env->exception.vaddress = addr + 4; - goto done; - } - if (arm_cpu_bswap_data(env)) { - val = deposit64((uint64_t)valhi, 32, 32, val); - } else { - val = deposit64(val, 32, 32, valhi); - } - } - if (val != env->exclusive_val) { - goto fail; - } - - val = env->regs[(env->exclusive_info >> 8) & 0xf]; - switch (size) { - case 0: - segv = put_user_u8(val, addr); - break; - case 1: - segv = put_user_data_u16(val, addr, env); - break; - case 2: - case 3: - segv = put_user_data_u32(val, addr, env); - break; - } - if (segv) { - env->exception.vaddress = addr; - goto done; - } - if (size == 3) { - val = env->regs[(env->exclusive_info >> 12) & 0xf]; - segv = put_user_data_u32(val, addr + 4, env); - if (segv) { - env->exception.vaddress = addr + 4; - goto done; - } - } - rc = 0; -fail: - env->regs[15] += 4; - env->regs[(env->exclusive_info >> 4) & 0xf] = rc; -done: - end_exclusive(); - return segv; -} - void cpu_loop(CPUARMState *env) { CPUState *cs = CPU(arm_env_get_cpu(env)); @@ -905,11 +817,6 @@ void cpu_loop(CPUARMState *env) case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; - case EXCP_STREX: - if (!do_strex(env)) { - break; - } - /* fall through for segv */ case EXCP_PREFETCH_ABORT: case EXCP_DATA_ABORT: addr = env->exception.vaddress; -- 2.5.5