Re: [PATCH 4/6] drm/i915/huc: Add debugfs for HuC loading status check

["Xiang, Haihao" <haihao.xiang@intel.com>]

Hi Peter,

Could you provide the interface for UMD driver to detect HuC FW loading
status in your new patch set? A normal user doesn't have permission to
read files in debugfs. Reusing I915_GETPARAM is fine for me.

Thanks
Haihao


> 
> > -----Original Message-----
> > From: Thierry, Michel
> > Sent: Thursday, June 23, 2016 3:48 AM
> > To: Antoine, Peter <peter.antoine@intel.com>; Xiang, Haihao
> > <haihao.xiang@intel.com>; daniel.vetter@ffwll.ch
> > Cc: Kelley, Sean V <sean.v.kelley@intel.com>; intel-
> > gfx@lists.freedesktop.org; Li, Lawrence T <lawrence.t.li@intel.com>
> > ; Vivi,
> > Rodrigo <rodrigo.vivi@intel.com>
> > Subject: Re: [Intel-gfx] [PATCH 4/6] drm/i915/huc: Add debugfs for
> > HuC
> > loading status check
> > 
> > On 6/23/2016 11:01 AM, Peter Antoine wrote:
> > > Daniel,
> > > 
> > > Is this suggestion acceptable? I don't want to waste time and
> > > effort
> > > writing code that is not going to be accepted?
> > > 
> > > Peter.
> > > 
> > 
> > Reuse I915_GETPARAM and do more-less what Chris did for
> > i915.enable_gvt? [1]
> > 
> > 
> > [1]
> > https://cgit.freedesktop.org/drm-
> > intel/commit/?id=7822492fd21a44eeb3568082b0ab915df7388061
> 
> Something along those lines would work for me with our media UMD.
> 
> Thanks,
> 
> Sean
> 
> > 
> > > On Thu, 23 Jun 2016, Xiang, Haihao wrote:
> > > 
> > > > 
> > > > Hi Peter,
> > > > 
> > > > Besides debugfs, could you add a IOCTL to check HuC loading
> > > > status?
> > > > Userspace media driver needs to advertise the features based on
> > > > HuC
> > > > to user.
> > > > 
> > > > Thanks
> > > > Haihao
> > > > 
> > > > 
> > > > > From: Alex Dai <yu.dai@intel.com>
> > > > > 
> > > > > Add debugfs entry for HuC loading status check.
> > > > > 
> > > > > Signed-off-by: Alex Dai <yu.dai@intel.com>
> > > > > Signed-off-by: Peter Antoine <peter.antoine@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/i915_debugfs.c | 32
> > > > > ++++++++++++++++++++++++++++++++
> > > > >  1 file changed, 32 insertions(+)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> > > > > b/drivers/gpu/drm/i915/i915_debugfs.c
> > > > > index 69964c2..f5976f8 100644
> > > > > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > > > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > > > > @@ -2479,6 +2479,37 @@ static int i915_llc(struct seq_file
> > > > > *m, void
> > > > > *data)
> > > > >      return 0;
> > > > >  }
> > > > > 
> > > > > +static int i915_huc_load_status_info(struct seq_file *m,
> > > > > void
> > > > > +*data) {
> > > > > +    struct drm_info_node *node = m->private;
> > > > > +    struct drm_i915_private *dev_priv = node->minor->dev-
> > > > > > dev_private;
> > > > > +    struct intel_uc_fw *huc_fw = &dev_priv->huc.huc_fw;
> > > > > +
> > > > > +    if (!HAS_HUC_UCODE(dev_priv->dev))
> > > > > +            return 0;
> > > > > +
> > > > > +    seq_puts(m, "HuC firmware status:\n");
> > > > > +    seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
> > > > > +    seq_printf(m, "\tfetch: %s\n",
> > > > > +            intel_uc_fw_status_repr(huc_fw->fetch_status));
> > > > > +    seq_printf(m, "\tload: %s\n",
> > > > > +            intel_uc_fw_status_repr(huc_fw->load_status));
> > > > > +    seq_printf(m, "\tversion wanted: %d.%d\n",
> > > > > +            huc_fw->major_ver_wanted, huc_fw-
> > > > > >minor_ver_wanted);
> > > > > +    seq_printf(m, "\tversion found: %d.%d\n",
> > > > > +            huc_fw->major_ver_found, huc_fw-
> > > > > >minor_ver_found);
> > > > > +    seq_printf(m, "\theader: offset is %d; size = %d\n",
> > > > > +            huc_fw->header_offset, huc_fw->header_size);
> > > > > +    seq_printf(m, "\tuCode: offset is %d; size = %d\n",
> > > > > +            huc_fw->ucode_offset, huc_fw->ucode_size);
> > > > > +    seq_printf(m, "\tRSA: offset is %d; size = %d\n",
> > > > > +            huc_fw->rsa_offset, huc_fw->rsa_size);
> > > > > +
> > > > > +    seq_printf(m, "\nHuC status 0x%08x:\n",
> > > > > I915_READ(HUC_STATUS2));
> > > > > +
> > > > > +    return 0;
> > > > > +}
> > > > > +
> > > > >  static int i915_guc_load_status_info(struct seq_file *m,
> > > > > void
> > > > > *data)  {
> > > > >      struct drm_info_node *node = m->private; @@ -5432,6
> > > > > +5463,7 @@
> > > > > static const struct drm_info_list i915_debugfs_list[] = {
> > > > >      {"i915_guc_info", i915_guc_info, 0},
> > > > >      {"i915_guc_load_status", i915_guc_load_status_info, 0},
> > > > >      {"i915_guc_log_dump", i915_guc_log_dump, 0},
> > > > > +    {"i915_huc_load_status", i915_huc_load_status_info, 0},
> > > > >      {"i915_frequency_info", i915_frequency_info, 0},
> > > > >      {"i915_hangcheck_info", i915_hangcheck_info, 0},
> > > > >      {"i915_drpc_info", i915_drpc_info, 0},
> > > 
> > > --
> > >     Peter Antoine (Android Graphics Driver Software Engineer)
> > >     -------------------------------------------------------------
> > > --------
> > >     Intel Corporation (UK) Limited
> > >     Registered No. 1134945 (England)
> > >     Registered Office: Pipers Way, Swindon SN3 1RJ
> > >     VAT No: 860 2173 47
> > > 
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