From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752193AbcGOUwA (ORCPT ); Fri, 15 Jul 2016 16:52:00 -0400 Received: from merlin.infradead.org ([205.233.59.134]:48359 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751833AbcGOUvY (ORCPT ); Fri, 15 Jul 2016 16:51:24 -0400 From: Arnaldo Carvalho de Melo To: Ingo Molnar Cc: linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Adrian Hunter , David Ahern , Jiri Olsa , Namhyung Kim , Wang Nan Subject: [PATCH 05/24] perf tools: Bail out at "--sort dcacheline" and cacheline_size not known Date: Fri, 15 Jul 2016 17:50:39 -0300 Message-Id: <1468615858-24936-6-git-send-email-acme@kernel.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1468615858-24936-1-git-send-email-acme@kernel.org> References: <1468615858-24936-1-git-send-email-acme@kernel.org> X-SRS-Rewrite: SMTP reverse-path rewritten from by merlin.infradead.org. See http://www.infradead.org/rpr.html Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Arnaldo Carvalho de Melo There are cases where further work would be needed to overcome the fact that neither sysconf(_SC_LEVEL1_DCACHE_LINESIZE) nor /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size are available in some systems (Android, for instance), so bail out when such a situation takes place. Cc: Adrian Hunter Cc: David Ahern Cc: Jiri Olsa Cc: Namhyung Kim Cc: Wang Nan Link: http://lkml.kernel.org/n/tip-ho8d8g8mh0o2dri7ckcccafi@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo --- tools/perf/util/sort.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c index 5854b4660a49..947d21f38398 100644 --- a/tools/perf/util/sort.c +++ b/tools/perf/util/sort.c @@ -2381,6 +2381,9 @@ static int sort_dimension__add(struct perf_hpp_list *list, const char *tok, if (sort__mode != SORT_MODE__MEMORY) return -EINVAL; + if (sd->entry == &sort_mem_dcacheline && cacheline_size == 0) + return -EINVAL; + if (sd->entry == &sort_mem_daddr_sym) list->sym = 1; @@ -2424,7 +2427,10 @@ static int setup_sort_list(struct perf_hpp_list *list, char *str, if (*tok) { ret = sort_dimension__add(list, tok, evlist, level); if (ret == -EINVAL) { - error("Invalid --sort key: `%s'", tok); + if (!cacheline_size && !strncasecmp(tok, "dcacheline", strlen(tok))) + error("The \"dcacheline\" --sort key needs to know the cacheline size and it couldn't be determined on this system"); + else + error("Invalid --sort key: `%s'", tok); break; } else if (ret == -ESRCH) { error("Unknown --sort key: `%s'", tok); -- 2.7.4