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diff for duplicates of <1469197775.25630.72.camel@buserror.net>

diff --git a/a/1.txt b/N1/1.txt
index 481d39a..5d073f8 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -5,19 +5,19 @@ On Fri, 2016-07-22 at 11:05 +0530, Bhaskar Upadhaya wrote:
 > --- a/arch/arm64/boot/dts/freescale/Makefile
 > +++ b/arch/arm64/boot/dts/freescale/Makefile
 > @@ -3,6 +3,9 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
-> ?dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
-> ?dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
-> ?dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
+>  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
+>  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
+>  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
 > +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
 > +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
 > +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
-?
 Please keep such lists sorted.
 
 > +&i2c0 {
 > +	status = "okay";
 > +
-> +	codec: sgtl5000 at a {
+> +	codec: sgtl5000@a {
 > +		#sound-dai-cells = <0>;
 > +		compatible = "fsl,sgtl5000";
 > +		reg = <0xa>;
@@ -25,9 +25,9 @@ Please keep such lists sorted.
 > +		VDDIO-supply = <&reg_1p8v>;
 > +		clocks = <&sys_mclk 1>;
 
-sys_mclk is a fixed-clock, with #clock-cells = <0>. ?What is the "1" for?
+sys_mclk is a fixed-clock, with #clock-cells = <0>.  What is the "1" for?
 
-> +	ethernet at 1 {
+> +	ethernet@1 {
 > +		compatible = "fsl,pfe-gemac-port";
 
 Binding?
@@ -50,7 +50,7 @@ No.
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
 
-simple-bus does not make sense with #size-cells = <0>. ?It's for memory-mapped 
+simple-bus does not make sense with #size-cells = <0>.  It's for memory-mapped 
 devices.
 
 > +};
@@ -69,12 +69,12 @@ Leave a blank line between nodes.
 > +		#size-cells = <0>;
 > +
 > +		/*
-> +		?* We expect the enable-method for cpu's to be "psci", but
+> +		 * We expect the enable-method for cpu's to be "psci", but
 > this
-> +		?* is dependent on the SoC FW, which will fill this in.
-> +		?*
-> +		?* Currently supported enable-method is psci v0.2
-> +		?*/
+> +		 * is dependent on the SoC FW, which will fill this in.
+> +		 *
+> +		 * Currently supported enable-method is psci v0.2
+> +		 */
 
 Why do you expect any enable-method on a chip with only one CPU?
 
@@ -89,9 +89,9 @@ Why do you expect any enable-method on a chip with only one CPU?
 > +	timer {
 > +		compatible = "arm,armv8-timer";
 > +		interrupts = <1 13 0x1>, /* Physical Secure PPI */
-> +			?????<1 14 0x1>, /* Physical Non-Secure PPI */
-> +			?????<1 11 0x1>, /* Virtual PPI */
-> +			?????<1 10 0x1>; /* Hypervisor PPI */
+> +			     <1 14 0x1>, /* Physical Non-Secure PPI */
+> +			     <1 11 0x1>, /* Virtual PPI */
+> +			     <1 10 0x1>; /* Hypervisor PPI */
 > +		arm,reread-timer;
 > +	};
 
@@ -102,7 +102,7 @@ from old deprecated internal stuff.
 
 
 > +
-> +		clockgen: clocking at 1ee1000 {
+> +		clockgen: clocking@1ee1000 {
 > +			compatible = "fsl,ls1012a-clockgen","fsl,ls1043a-
 > clockgen";
 > +			reg = <0x0 0x1ee1000 0x0 0x1000>;
@@ -110,12 +110,12 @@ from old deprecated internal stuff.
 > +			clocks = <&sysclk>;
 > +		};
 
-clockgen nodes should not claim compatibility with another SoC. ?The clocking
+clockgen nodes should not claim compatibility with another SoC.  The clocking
 options on ls1012a are not the same as on ls1043a.
 
 
 > +
-> +		scfg: scfg at 1570000 {
+> +		scfg: scfg@1570000 {
 > +			compatible = "fsl,ls1012a-scfg", "fsl,ls1043a-
 > scfg", "syscon";
 > +			reg = <0x0 0x1570000 0x0 0x10000>;
@@ -124,7 +124,7 @@ options on ls1012a are not the same as on ls1043a.
 
 The SCFG on ls1021a is not compatible with ls1043a.
 
-> +		reset: reset at 1EE00B0 {
+> +		reset: reset@1EE00B0 {
 > +			compatible = "fsl,ls-reset";
 > +			reg = <0x0 0x1EE00B0 0x0 0x4>;
 > +			big-endian;
@@ -133,32 +133,32 @@ The SCFG on ls1021a is not compatible with ls1043a.
 This was an old internal hack that doesn't belong here.
 
 > +
-> +		rcpm: rcpm at 1ee2000 {
+> +		rcpm: rcpm@1ee2000 {
 > +			compatible = "fsl,ls1012a-rcpm", "fsl,ls1043a-
 > rcpm", "fsl,qoriq-rcpm-2.1";
 > +			reg = <0x0 0x1ee2000 0x0 0x10000>;
 
-The RCPM on ls1043a has several registers that ls1012a does not have. ?They
+The RCPM on ls1043a has several registers that ls1012a does not have.  They
 are not compatible.
 
 "rcpm-2.1" is probably not appropriate either.
 
 > +		};
 > +
-> +????????????????ftm0: ftm0 at 29d0000 {
-> +????????????????????????compatible = "fsl,ftm-alarm";
-> +????????????????????????reg = <0x0 0x29d0000 0x0 0x10000>;
-> +????????????????????????interrupts = <0 86 0x4>;
-> +????????????????????????big-endian;
+> +                ftm0: ftm0@29d0000 {
+> +                        compatible = "fsl,ftm-alarm";
+> +                        reg = <0x0 0x29d0000 0x0 0x10000>;
+> +                        interrupts = <0 86 0x4>;
+> +                        big-endian;
 > +			rcpm-wakeup = <&rcpm 0x00020000 0x0>;
-> +????????????????????????status = "disabled";
-> +????????????????};
+> +                        status = "disabled";
+> +                };
 > +
-> +		esdhc0: esdhc at 1560000 {
+> +		esdhc0: esdhc@1560000 {
 
 Whitespace
 
-> +		tmu: tmu at 1f00000 {
+> +		tmu: tmu@1f00000 {
 > +			compatible = "fsl,qoriq-tmu", "fsl,ls1012a-tmu";
 
 More specific compatibles come first.
@@ -168,7 +168,7 @@ More specific compatibles come first.
 > +		#size-cells = <2>;
 > +		ranges;
 > +
-> +		pfe_reserved: packetbuffer at 83400000 {
+> +		pfe_reserved: packetbuffer@83400000 {
 > +			reg = <0 0x83400000 0 0xc00000>;
 > +		};
 > +	};
@@ -176,14 +176,14 @@ More specific compatibles come first.
 Could you explain this reservation?
 
 > +
-> +	pfe: pfe at 04000000 {
+> +	pfe: pfe@04000000 {
 > +		compatible = "fsl,pfe";
 > +		ranges = <0x0 0x00 0x04000000 0xc00000
-> +			??0x1 0x00 0x83400000 0xc00000>;
-> +		reg =???<0x0 0x90500000 0x0 0x10000>,	/* APB 64K */
+> +			  0x1 0x00 0x83400000 0xc00000>;
+> +		reg =   <0x0 0x90500000 0x0 0x10000>,	/* APB 64K */
 > +			<0x0 0x04000000 0x0 0xc00000>,	/* AXI 16M */
-> +			<0x0 0x83400000 0x0 0xc00000>,????/* PFE DDR 12M */
-> +			<0x0 0x10000000 0x0 0x2000>;	/* OCRAM 8K??*/
+> +			<0x0 0x83400000 0x0 0xc00000>,    /* PFE DDR 12M */
+> +			<0x0 0x10000000 0x0 0x2000>;	/* OCRAM 8K  */
 > +		fsl,pfe-num-interfaces = < 0x2 >;
 > +		interrupts = <0 172 0x4>;
 > +		#interrupt-names = "hifirq";
@@ -199,3 +199,8 @@ Binding?
 Don't put a blank line between these.
 
 -Scott
+
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 9860753..5cdb786 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,8 +1,22 @@
  "ref\01469165712-4356-1-git-send-email-Bhaskar.Upadhaya@nxp.com\0"
- "From\0oss@buserror.net (Scott Wood)\0"
- "Subject\0[PATCH] [linux-devel]arm64: Add DTS support for FSL's LS1012A SoC\0"
+ "ref\01469165712-4356-1-git-send-email-Bhaskar.Upadhaya-3arQi8VN3Tc@public.gmane.org\0"
+ "From\0Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>\0"
+ "Subject\0Re: [PATCH] [linux-devel]arm64: Add DTS support for FSL's LS1012A SoC\0"
  "Date\0Fri, 22 Jul 2016 09:29:35 -0500\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Bhaskar Upadhaya <Bhaskar.Upadhaya-3arQi8VN3Tc@public.gmane.org>"
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+ " shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org\0"
+ "Cc\0stuart.yoder-3arQi8VN3Tc@public.gmane.org"
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  Prabhakar Kushwaha <prabhakar.kushwaha-3arQi8VN3Tc@public.gmane.org>
+  Calvin Johnson <calvin.johnson-3arQi8VN3Tc@public.gmane.org>
+  Makarand Pawagi <makarand.pawagi-3arQi8VN3Tc@public.gmane.org>
+  Pratiyush Mohan Srivastava <pratiyush.srivastava-3arQi8VN3Tc@public.gmane.org>
+  Yunhui Cui <yunhui.cui-3arQi8VN3Tc@public.gmane.org>
+  Rajesh Bhagat <rajesh.bhagat-3arQi8VN3Tc@public.gmane.org>
+  Alison Wang <alison.wang-3arQi8VN3Tc@public.gmane.org>
+  Jia Hongtao <hongtao.jia-3arQi8VN3Tc@public.gmane.org>
+ " Anji J <anji.jagarlmudi-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "On Fri, 2016-07-22 at 11:05 +0530, Bhaskar Upadhaya wrote:\n"
@@ -12,19 +26,19 @@
  "> --- a/arch/arm64/boot/dts/freescale/Makefile\n"
  "> +++ b/arch/arm64/boot/dts/freescale/Makefile\n"
  "> @@ -3,6 +3,9 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb\n"
- "> ?dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb\n"
- "> ?dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb\n"
- "> ?dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb\n"
+ "> \302\240dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb\n"
+ "> \302\240dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb\n"
+ "> \302\240dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb\n"
  "> +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb\n"
  "> +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb\n"
  "> +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb\n"
- "?\n"
+ "\302\240\n"
  "Please keep such lists sorted.\n"
  "\n"
  "> +&i2c0 {\n"
  "> +\tstatus = \"okay\";\n"
  "> +\n"
- "> +\tcodec: sgtl5000 at a {\n"
+ "> +\tcodec: sgtl5000@a {\n"
  "> +\t\t#sound-dai-cells = <0>;\n"
  "> +\t\tcompatible = \"fsl,sgtl5000\";\n"
  "> +\t\treg = <0xa>;\n"
@@ -32,9 +46,9 @@
  "> +\t\tVDDIO-supply = <&reg_1p8v>;\n"
  "> +\t\tclocks = <&sys_mclk 1>;\n"
  "\n"
- "sys_mclk is a fixed-clock, with #clock-cells = <0>. ?What is the \"1\" for?\n"
+ "sys_mclk is a fixed-clock, with #clock-cells = <0>. \302\240What is the \"1\" for?\n"
  "\n"
- "> +\tethernet at 1 {\n"
+ "> +\tethernet@1 {\n"
  "> +\t\tcompatible = \"fsl,pfe-gemac-port\";\n"
  "\n"
  "Binding?\n"
@@ -57,7 +71,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "\n"
- "simple-bus does not make sense with #size-cells = <0>. ?It's for memory-mapped \n"
+ "simple-bus does not make sense with #size-cells = <0>. \302\240It's for memory-mapped \n"
  "devices.\n"
  "\n"
  "> +};\n"
@@ -76,12 +90,12 @@
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
  "> +\t\t/*\n"
- "> +\t\t?* We expect the enable-method for cpu's to be \"psci\", but\n"
+ "> +\t\t\302\240* We expect the enable-method for cpu's to be \"psci\", but\n"
  "> this\n"
- "> +\t\t?* is dependent on the SoC FW, which will fill this in.\n"
- "> +\t\t?*\n"
- "> +\t\t?* Currently supported enable-method is psci v0.2\n"
- "> +\t\t?*/\n"
+ "> +\t\t\302\240* is dependent on the SoC FW, which will fill this in.\n"
+ "> +\t\t\302\240*\n"
+ "> +\t\t\302\240* Currently supported enable-method is psci v0.2\n"
+ "> +\t\t\302\240*/\n"
  "\n"
  "Why do you expect any enable-method on a chip with only one CPU?\n"
  "\n"
@@ -96,9 +110,9 @@
  "> +\ttimer {\n"
  "> +\t\tcompatible = \"arm,armv8-timer\";\n"
  "> +\t\tinterrupts = <1 13 0x1>, /* Physical Secure PPI */\n"
- "> +\t\t\t?????<1 14 0x1>, /* Physical Non-Secure PPI */\n"
- "> +\t\t\t?????<1 11 0x1>, /* Virtual PPI */\n"
- "> +\t\t\t?????<1 10 0x1>; /* Hypervisor PPI */\n"
+ "> +\t\t\t\302\240\302\240\302\240\302\240\302\240<1 14 0x1>, /* Physical Non-Secure PPI */\n"
+ "> +\t\t\t\302\240\302\240\302\240\302\240\302\240<1 11 0x1>, /* Virtual PPI */\n"
+ "> +\t\t\t\302\240\302\240\302\240\302\240\302\240<1 10 0x1>; /* Hypervisor PPI */\n"
  "> +\t\tarm,reread-timer;\n"
  "> +\t};\n"
  "\n"
@@ -109,7 +123,7 @@
  "\n"
  "\n"
  "> +\n"
- "> +\t\tclockgen: clocking at 1ee1000 {\n"
+ "> +\t\tclockgen: clocking@1ee1000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-clockgen\",\"fsl,ls1043a-\n"
  "> clockgen\";\n"
  "> +\t\t\treg = <0x0 0x1ee1000 0x0 0x1000>;\n"
@@ -117,12 +131,12 @@
  "> +\t\t\tclocks = <&sysclk>;\n"
  "> +\t\t};\n"
  "\n"
- "clockgen nodes should not claim compatibility with another SoC. ?The clocking\n"
+ "clockgen nodes should not claim compatibility with another SoC. \302\240The clocking\n"
  "options on ls1012a are not the same as on ls1043a.\n"
  "\n"
  "\n"
  "> +\n"
- "> +\t\tscfg: scfg at 1570000 {\n"
+ "> +\t\tscfg: scfg@1570000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-scfg\", \"fsl,ls1043a-\n"
  "> scfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x0 0x1570000 0x0 0x10000>;\n"
@@ -131,7 +145,7 @@
  "\n"
  "The SCFG on ls1021a is not compatible with ls1043a.\n"
  "\n"
- "> +\t\treset: reset at 1EE00B0 {\n"
+ "> +\t\treset: reset@1EE00B0 {\n"
  "> +\t\t\tcompatible = \"fsl,ls-reset\";\n"
  "> +\t\t\treg = <0x0 0x1EE00B0 0x0 0x4>;\n"
  "> +\t\t\tbig-endian;\n"
@@ -140,32 +154,32 @@
  "This was an old internal hack that doesn't belong here.\n"
  "\n"
  "> +\n"
- "> +\t\trcpm: rcpm at 1ee2000 {\n"
+ "> +\t\trcpm: rcpm@1ee2000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-rcpm\", \"fsl,ls1043a-\n"
  "> rcpm\", \"fsl,qoriq-rcpm-2.1\";\n"
  "> +\t\t\treg = <0x0 0x1ee2000 0x0 0x10000>;\n"
  "\n"
- "The RCPM on ls1043a has several registers that ls1012a does not have. ?They\n"
+ "The RCPM on ls1043a has several registers that ls1012a does not have. \302\240They\n"
  "are not compatible.\n"
  "\n"
  "\"rcpm-2.1\" is probably not appropriate either.\n"
  "\n"
  "> +\t\t};\n"
  "> +\n"
- "> +????????????????ftm0: ftm0 at 29d0000 {\n"
- "> +????????????????????????compatible = \"fsl,ftm-alarm\";\n"
- "> +????????????????????????reg = <0x0 0x29d0000 0x0 0x10000>;\n"
- "> +????????????????????????interrupts = <0 86 0x4>;\n"
- "> +????????????????????????big-endian;\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240ftm0: ftm0@29d0000 {\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240compatible = \"fsl,ftm-alarm\";\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240reg = <0x0 0x29d0000 0x0 0x10000>;\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240interrupts = <0 86 0x4>;\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240big-endian;\n"
  "> +\t\t\trcpm-wakeup = <&rcpm 0x00020000 0x0>;\n"
- "> +????????????????????????status = \"disabled\";\n"
- "> +????????????????};\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240status = \"disabled\";\n"
+ "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240};\n"
  "> +\n"
- "> +\t\tesdhc0: esdhc at 1560000 {\n"
+ "> +\t\tesdhc0: esdhc@1560000 {\n"
  "\n"
  "Whitespace\n"
  "\n"
- "> +\t\ttmu: tmu at 1f00000 {\n"
+ "> +\t\ttmu: tmu@1f00000 {\n"
  "> +\t\t\tcompatible = \"fsl,qoriq-tmu\", \"fsl,ls1012a-tmu\";\n"
  "\n"
  "More specific compatibles come first.\n"
@@ -175,7 +189,7 @@
  "> +\t\t#size-cells = <2>;\n"
  "> +\t\tranges;\n"
  "> +\n"
- "> +\t\tpfe_reserved: packetbuffer at 83400000 {\n"
+ "> +\t\tpfe_reserved: packetbuffer@83400000 {\n"
  "> +\t\t\treg = <0 0x83400000 0 0xc00000>;\n"
  "> +\t\t};\n"
  "> +\t};\n"
@@ -183,14 +197,14 @@
  "Could you explain this reservation?\n"
  "\n"
  "> +\n"
- "> +\tpfe: pfe at 04000000 {\n"
+ "> +\tpfe: pfe@04000000 {\n"
  "> +\t\tcompatible = \"fsl,pfe\";\n"
  "> +\t\tranges = <0x0 0x00 0x04000000 0xc00000\n"
- "> +\t\t\t??0x1 0x00 0x83400000 0xc00000>;\n"
- "> +\t\treg =???<0x0 0x90500000 0x0 0x10000>,\t/* APB 64K */\n"
+ "> +\t\t\t\302\240\302\2400x1 0x00 0x83400000 0xc00000>;\n"
+ "> +\t\treg =\302\240\302\240\302\240<0x0 0x90500000 0x0 0x10000>,\t/* APB 64K */\n"
  "> +\t\t\t<0x0 0x04000000 0x0 0xc00000>,\t/* AXI 16M */\n"
- "> +\t\t\t<0x0 0x83400000 0x0 0xc00000>,????/* PFE DDR 12M */\n"
- "> +\t\t\t<0x0 0x10000000 0x0 0x2000>;\t/* OCRAM 8K??*/\n"
+ "> +\t\t\t<0x0 0x83400000 0x0 0xc00000>,\302\240\302\240\302\240\302\240/* PFE DDR 12M */\n"
+ "> +\t\t\t<0x0 0x10000000 0x0 0x2000>;\t/* OCRAM 8K\302\240\302\240*/\n"
  "> +\t\tfsl,pfe-num-interfaces = < 0x2 >;\n"
  "> +\t\tinterrupts = <0 172 0x4>;\n"
  "> +\t\t#interrupt-names = \"hifirq\";\n"
@@ -205,6 +219,11 @@
  "\n"
  "Don't put a blank line between these.\n"
  "\n"
- -Scott
+ "-Scott\n"
+ "\n"
+ "--\n"
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+7723d0d5f25e59ef9f526980171090ea990bc538cd464c4482c641cfee7395e8

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