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From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 22/31] drm/i915: Unify request submission
Date: Mon, 25 Jul 2016 12:49:02 +0300	[thread overview]
Message-ID: <1469440142.5495.39.camel@linux.intel.com> (raw)
In-Reply-To: <1469432687-22756-23-git-send-email-chris@chris-wilson.co.uk>

On ma, 2016-07-25 at 08:44 +0100, Chris Wilson wrote:
> Move request submission from emit_request into its own common vfunc
> from i915_add_request().
> 
> v2: Convert I915_DISPATCH_flags to BIT(x) whilst passing
> v3: Rename a few functions to match.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem_request.c    |  8 +++-----
>  drivers/gpu/drm/i915/i915_guc_submission.c |  9 ++++++---
>  drivers/gpu/drm/i915/intel_guc.h           |  1 -
>  drivers/gpu/drm/i915/intel_lrc.c           | 18 +++++++-----------
>  drivers/gpu/drm/i915/intel_ringbuffer.c    | 23 +++++++++--------------
>  drivers/gpu/drm/i915/intel_ringbuffer.h    | 23 +++++++++++------------
>  6 files changed, 36 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
> index 8814e9c5266b..f4bf9f669eed 100644
> --- a/drivers/gpu/drm/i915/i915_gem_request.c
> +++ b/drivers/gpu/drm/i915/i915_gem_request.c
> @@ -467,12 +467,9 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>  	 */
>  	request->postfix = ring->tail;
>  
> -	if (i915.enable_execlists)
> -		ret = engine->emit_request(request);
> -	else
> -		ret = engine->add_request(request);
>  	/* Not allowed to fail! */
> -	WARN(ret, "emit|add_request failed: %d!\n", ret);
> +	ret = engine->emit_request(request);
> +	WARN(ret, "(%s)->emit_request failed: %d!\n", engine->name, ret);
>  
>  	/* Sanity check that the reserved size was large enough. */
>  	ret = ring->tail - request_start;
> @@ -484,6 +481,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>  		  reserved_tail, ret);
>  
>  	i915_gem_mark_busy(engine);
> +	engine->submit_request(request);
>  }
>  
>  static unsigned long local_clock_us(unsigned int *cpu)
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index eccd34832fe6..32d0e1890950 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -585,7 +585,7 @@ static int guc_ring_doorbell(struct i915_guc_client *gc)
>   * The only error here arises if the doorbell hardware isn't functioning
>   * as expected, which really shouln't happen.
>   */
> -int i915_guc_submit(struct drm_i915_gem_request *rq)
> +static void i915_guc_submit(struct drm_i915_gem_request *rq)
>  {
>  	unsigned int engine_id = rq->engine->id;
>  	struct intel_guc *guc = &rq->i915->guc;
> @@ -602,8 +602,6 @@ int i915_guc_submit(struct drm_i915_gem_request *rq)
>  
>  	guc->submissions[engine_id] += 1;
>  	guc->last_seqno[engine_id] = rq->fence.seqno;
> -
> -	return b_ret;
>  }
>  
>  /*
> @@ -992,6 +990,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_guc *guc = &dev_priv->guc;
>  	struct i915_guc_client *client;
> +	struct intel_engine_cs *engine;
>  
>  	/* client for execbuf submission */
>  	client = guc_client_alloc(dev_priv,
> @@ -1006,6 +1005,10 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
>  	host2guc_sample_forcewake(guc, client);
>  	guc_init_doorbell_hw(guc);
>  
> +	/* Take over from manual control of ELSP (execlists) */
> +	for_each_engine(engine, dev_priv)
> +		engine->submit_request = i915_guc_submit;
> +
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index 3e3e743740c0..623cf26cd784 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -160,7 +160,6 @@ extern int intel_guc_resume(struct drm_device *dev);
>  int i915_guc_submission_init(struct drm_i915_private *dev_priv);
>  int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
>  int i915_guc_wq_check_space(struct drm_i915_gem_request *rq);
> -int i915_guc_submit(struct drm_i915_gem_request *rq);
>  void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
>  void i915_guc_submission_fini(struct drm_i915_private *dev_priv);
>  
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 250edb2bcef7..a9ca31c113c3 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -738,7 +738,7 @@ err_unpin:
>  }
>  
>  /*
> - * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
> + * intel_logical_ring_advance() - advance the tail and prepare for submission
>   * @request: Request to advance the logical ringbuffer of.
>   *
>   * The tail is updated in our logical ringbuffer struct, not in the actual context. What
> @@ -747,7 +747,7 @@ err_unpin:
>   * point, the tail *inside* the context is updated and the ELSP written to.
>   */
>  static int
> -intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request)
> +intel_logical_ring_advance(struct drm_i915_gem_request *request)
>  {
>  	struct intel_ring *ring = request->ring;
>  	struct intel_engine_cs *engine = request->engine;
> @@ -773,12 +773,6 @@ intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request)
>  	 */
>  	request->previous_context = engine->last_context;
>  	engine->last_context = request->ctx;
> -
> -	if (i915.enable_guc_submission)
> -		i915_guc_submit(request);
> -	else
> -		execlists_context_queue(request);
> -
>  	return 0;
>  }
>  
> @@ -1775,7 +1769,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
>  	intel_ring_emit(ring, request->fence.seqno);
>  	intel_ring_emit(ring, MI_USER_INTERRUPT);
>  	intel_ring_emit(ring, MI_NOOP);
> -	return intel_logical_ring_advance_and_submit(request);
> +	return intel_logical_ring_advance(request);
>  }
>  
>  static int gen8_emit_request_render(struct drm_i915_gem_request *request)
> @@ -1806,7 +1800,7 @@ static int gen8_emit_request_render(struct drm_i915_gem_request *request)
>  	intel_ring_emit(ring, 0);
>  	intel_ring_emit(ring, MI_USER_INTERRUPT);
>  	intel_ring_emit(ring, MI_NOOP);
> -	return intel_logical_ring_advance_and_submit(request);
> +	return intel_logical_ring_advance(request);
>  }
>  
>  static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
> @@ -1912,8 +1906,10 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)
>  {
>  	/* Default vfuncs which can be overriden by each engine. */
>  	engine->init_hw = gen8_init_common_ring;
> -	engine->emit_request = gen8_emit_request;
>  	engine->emit_flush = gen8_emit_flush;
> +	engine->emit_request = gen8_emit_request;
> +	engine->submit_request = execlists_context_queue;
> +
>  	engine->irq_enable = gen8_logical_ring_enable_irq;
>  	engine->irq_disable = gen8_logical_ring_disable_irq;
>  	engine->emit_bb_start = gen8_emit_bb_start;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 3e1049c972e0..2fa7db5331c3 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1441,15 +1441,14 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
>  }
>  
>  /**
> - * gen6_add_request - Update the semaphore mailbox registers
> + * gen6_emit_request - Update the semaphore mailbox registers
>   *
>   * @request - request to write to the ring
>   *
>   * Update the mailbox registers in the *other* rings with the current seqno.
>   * This acts like a signal in the canonical semaphore.
>   */
> -static int
> -gen6_add_request(struct drm_i915_gem_request *req)
> +static int gen6_emit_request(struct drm_i915_gem_request *req)
>  {
>  	struct intel_engine_cs *engine = req->engine;
>  	struct intel_ring *ring = req->ring;
> @@ -1470,13 +1469,11 @@ gen6_add_request(struct drm_i915_gem_request *req)
>  	intel_ring_advance(ring);
>  
>  	req->tail = ring->tail;
> -	engine->submit_request(req);
>  
>  	return 0;
>  }
>  
> -static int
> -gen8_render_add_request(struct drm_i915_gem_request *req)
> +static int gen8_render_emit_request(struct drm_i915_gem_request *req)
>  {
>  	struct intel_engine_cs *engine = req->engine;
>  	struct intel_ring *ring = req->ring;
> @@ -1500,9 +1497,9 @@ gen8_render_add_request(struct drm_i915_gem_request *req)
>  	intel_ring_emit(ring, 0);
>  	intel_ring_emit(ring, MI_USER_INTERRUPT);
>  	intel_ring_emit(ring, MI_NOOP);
> +	intel_ring_advance(ring);
>  
>  	req->tail = ring->tail;
> -	engine->submit_request(req);
>  
>  	return 0;
>  }
> @@ -1707,8 +1704,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
>  	return 0;
>  }
>  
> -static int
> -i9xx_add_request(struct drm_i915_gem_request *req)
> +static int i9xx_emit_request(struct drm_i915_gem_request *req)
>  {
>  	struct intel_ring *ring = req->ring;
>  	int ret;
> @@ -1724,7 +1720,6 @@ i9xx_add_request(struct drm_i915_gem_request *req)
>  	intel_ring_advance(ring);
>  
>  	req->tail = ring->tail;
> -	req->engine->submit_request(req);
>  
>  	return 0;
>  }
> @@ -2829,11 +2824,11 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
>  				      struct intel_engine_cs *engine)
>  {
>  	engine->init_hw = init_ring_common;
> -	engine->submit_request = i9xx_submit_request;
>  
> -	engine->add_request = i9xx_add_request;
> +	engine->emit_request = i9xx_emit_request;
>  	if (INTEL_GEN(dev_priv) >= 6)
> -		engine->add_request = gen6_add_request;
> +		engine->emit_request = gen6_emit_request;
> +	engine->submit_request = i9xx_submit_request;
>  
>  	if (INTEL_GEN(dev_priv) >= 8)
>  		engine->emit_bb_start = gen8_emit_bb_start;
> @@ -2862,7 +2857,7 @@ int intel_init_render_ring_buffer(struct intel_engine_cs *engine)
>  
>  	if (INTEL_GEN(dev_priv) >= 8) {
>  		engine->init_context = intel_rcs_ctx_init;
> -		engine->add_request = gen8_render_add_request;
> +		engine->emit_request = gen8_render_emit_request;
>  		engine->emit_flush = gen8_render_ring_flush;
>  		if (i915.semaphores)
>  			engine->semaphore.signal = gen8_rcs_signal;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 5428a3c288d5..fdf085495e3a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -204,7 +204,17 @@ struct intel_engine_cs {
>  
>  	int		(*init_context)(struct drm_i915_gem_request *req);
>  
> -	int		(*add_request)(struct drm_i915_gem_request *req);
> +	int		(*emit_flush)(struct drm_i915_gem_request *request,
> +				      u32 invalidate_domains,
> +				      u32 flush_domains);
> +	int		(*emit_bb_start)(struct drm_i915_gem_request *req,
> +					 u64 offset, u32 length,
> +					 unsigned int dispatch_flags);
> +#define I915_DISPATCH_SECURE BIT(0)
> +#define I915_DISPATCH_PINNED BIT(1)
> +#define I915_DISPATCH_RS     BIT(2)
> +	int		(*emit_request)(struct drm_i915_gem_request *req);
> +	void		(*submit_request)(struct drm_i915_gem_request *req);
>  	/* Some chipsets are not quite as coherent as advertised and need
>  	 * an expensive kick to force a true read of the up-to-date seqno.
>  	 * However, the up-to-date seqno is not always required and the last
> @@ -282,17 +292,6 @@ struct intel_engine_cs {
>  	unsigned int idle_lite_restore_wa;
>  	bool disable_lite_restore_wa;
>  	u32 ctx_desc_template;
> -	int		(*emit_request)(struct drm_i915_gem_request *request);
> -	int		(*emit_flush)(struct drm_i915_gem_request *request,
> -				      u32 invalidate_domains,
> -				      u32 flush_domains);
> -	int		(*emit_bb_start)(struct drm_i915_gem_request *req,
> -					 u64 offset, u32 length,
> -					 unsigned int dispatch_flags);
> -#define I915_DISPATCH_SECURE 0x1
> -#define I915_DISPATCH_PINNED 0x2
> -#define I915_DISPATCH_RS     0x4
> -	void		(*submit_request)(struct drm_i915_gem_request *req);
>  
>  	/**
>  	 * List of objects currently involved in rendering from the
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-07-25  9:49 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-25  7:44 Refined set of intel_ringbuffer renames Chris Wilson
2016-07-25  7:44 ` [PATCH 01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() Chris Wilson
2016-07-26  4:37   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 02/31] drm/i915: Prefer list_first_entry_or_null Chris Wilson
2016-07-25  7:55   ` Joonas Lahtinen
2016-07-25  8:03     ` Chris Wilson
2016-07-25 10:01       ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 03/31] drm/i915: Only clear the client pointer when tearing down the file Chris Wilson
2016-07-25  8:15   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 04/31] drm/i915: Only drop the batch-pool's object reference Chris Wilson
2016-07-25  8:38   ` Joonas Lahtinen
2016-07-25  8:44     ` Chris Wilson
2016-07-25 10:43       ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 05/31] drm/i915/cmdparser: Remove stray intel_engine_cs *ring Chris Wilson
2016-07-25  8:40   ` Joonas Lahtinen
2016-07-25  9:06     ` [PATCH v2] " Chris Wilson
2016-07-25 11:01       ` Joonas Lahtinen
2016-07-25 11:12         ` Chris Wilson
2016-07-25  7:44 ` [PATCH 06/31] drm/i915: Use engine to refer to the user's BSD intel_engine_cs Chris Wilson
2016-07-25  8:42   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 07/31] drm/i915: Avoid using intel_engine_cs *ring for GPU error capture Chris Wilson
2016-07-25  7:44 ` [PATCH 08/31] drm/i915: Remove stray intel_engine_cs ring identifiers from i915_gem.c Chris Wilson
2016-07-25  8:45   ` Joonas Lahtinen
2016-07-25  8:49     ` Chris Wilson
2016-07-26 15:12       ` Dave Gordon
2016-07-25  7:44 ` [PATCH 09/31] drm/i915: Update a couple of hangcheck comments to talk about engines Chris Wilson
2016-07-25  8:46   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 10/31] drm/i915: Unify intel_logical_ring_emit and intel_ring_emit Chris Wilson
2016-07-25  7:44 ` [PATCH 11/31] drm/i915: Rename request->ringbuf to request->ring Chris Wilson
2016-07-25  7:44 ` [PATCH 12/31] drm/i915: Rename backpointer from intel_ringbuffer to intel_engine_cs Chris Wilson
2016-07-25  8:49   ` Joonas Lahtinen
2016-07-25  9:10     ` Chris Wilson
2016-07-25  7:44 ` [PATCH 13/31] drm/i915: Rename intel_context[engine].ringbuf Chris Wilson
2016-07-25  7:44 ` [PATCH 14/31] drm/i915: Rename struct intel_ringbuffer to struct intel_ring Chris Wilson
2016-07-25  7:44 ` [PATCH 15/31] drm/i915: Rename residual ringbuf parameters Chris Wilson
2016-07-25  8:58   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 16/31] drm/i915: Rename intel_pin_and_map_ring() Chris Wilson
2016-07-25  7:44 ` [PATCH 17/31] drm/i915: Remove obsolete engine->gpu_caches_dirty Chris Wilson
2016-07-25  9:14   ` Joonas Lahtinen
2016-07-25  9:24     ` Chris Wilson
2016-07-27  9:49   ` Dave Gordon
2016-07-27 10:00     ` Chris Wilson
2016-07-27 11:18       ` Dave Gordon
2016-07-27 11:26       ` Joonas Lahtinen
2016-07-27 10:53     ` [PATCH] drm/i915: Reduce engine->emit_flush() to a single mode parameter Chris Wilson
2016-07-28  7:11       ` Joonas Lahtinen
2016-07-28  8:37         ` Chris Wilson
2016-07-28 10:03           ` Joonas Lahtinen
2016-07-28 14:57       ` Dave Gordon
2016-07-25  7:44 ` [PATCH 18/31] drm/i915: Simplify request_alloc by returning the allocated request Chris Wilson
2016-07-25  9:18   ` Joonas Lahtinen
2016-07-27 11:08     ` Dave Gordon
2016-07-27 15:28       ` Chris Wilson
2016-07-28 12:48         ` Dave Gordon
2016-07-28 15:10           ` Chris Wilson
2016-07-28 15:20             ` Dave Gordon
2016-07-25  7:44 ` [PATCH 19/31] drm/i915: Unify legacy/execlists emission of MI_BATCHBUFFER_START Chris Wilson
2016-07-25  7:44 ` [PATCH 20/31] drm/i915: Remove intel_ring_get_tail() Chris Wilson
2016-07-25  9:43   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 21/31] drm/i915: Convert engine->write_tail to operate on a request Chris Wilson
2016-07-27 11:53   ` Dave Gordon
2016-07-27 12:29     ` Chris Wilson
2016-07-28 15:05       ` Dave Gordon
2016-07-28 15:09         ` Chris Wilson
2016-07-27 12:30     ` Chris Wilson
2016-07-28  6:41       ` Joonas Lahtinen
2016-07-28  7:12         ` Chris Wilson
2016-07-28  7:52           ` Joonas Lahtinen
2016-07-28  9:16             ` [PATCH 1/2] " Chris Wilson
2016-07-28  9:16               ` [PATCH 2/2] drm/i915: Move the modulus for ring emission to the register write Chris Wilson
2016-07-28  9:59                 ` Joonas Lahtinen
2016-07-28 15:16                 ` Dave Gordon
2016-07-25  7:44 ` [PATCH 22/31] drm/i915: Unify request submission Chris Wilson
2016-07-25  9:49   ` Joonas Lahtinen [this message]
2016-07-25  7:44 ` [PATCH 23/31] drm/i915/lrc: Update function names to match request flow Chris Wilson
2016-07-25  9:50   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 24/31] drm/i915: Stop passing caller's num_dwords to engine->semaphore.signal() Chris Wilson
2016-07-25  9:53   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 25/31] drm/i915: Reuse legacy breadcrumbs + tail emission Chris Wilson
2016-07-28 15:23   ` Dave Gordon
2016-07-28 15:29     ` Chris Wilson
2016-07-28 15:33       ` Dave Gordon
2016-07-25  7:44 ` [PATCH 26/31] drm/i915/ringbuffer: Specialise SNB+ request emission for semaphores Chris Wilson
2016-07-25  9:55   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 27/31] drm/i915: Remove duplicate golden render state init from execlists Chris Wilson
2016-07-25  7:44 ` [PATCH 28/31] drm/i915: Refactor golden render state emission to unconfuse gcc Chris Wilson
2016-07-25  9:59   ` Joonas Lahtinen
2016-07-25  7:44 ` [PATCH 29/31] drm/i915: Unify legacy/execlists submit_execbuf callbacks Chris Wilson
2016-07-25  7:44 ` [PATCH 30/31] drm/i915: Simplify calling engine->sync_to Chris Wilson
2016-07-25  7:44 ` [PATCH 31/31] drm/i915: Rename engine->semaphore.sync_to, engine->sempahore.signal locals Chris Wilson
2016-07-25  8:28 ` ✓ Ro.CI.BAT: success for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() Patchwork
2016-07-25  9:32 ` ✓ Ro.CI.BAT: success for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() (rev2) Patchwork
2016-07-27 11:00 ` ✗ Ro.CI.BAT: failure for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() (rev3) Patchwork
2016-07-28  9:20 ` ✗ Ro.CI.BAT: failure for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() (rev5) Patchwork

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