diff for duplicates of <1469698084-20185-11-git-send-email-yt.shen@mediatek.com> diff --git a/a/1.txt b/N1/1.txt index d7d1a3d..d132421 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -25,7 +25,7 @@ index 363de0d..7da9310 100644 power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; }; -+ mipi_tx0: mipi-dphy@10010000 { ++ mipi_tx0: mipi-dphy at 10010000 { + compatible = "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; @@ -35,14 +35,14 @@ index 363de0d..7da9310 100644 + status = "disabled"; + }; + - sysirq: interrupt-controller@10200100 { + sysirq: interrupt-controller at 10200100 { compatible = "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq"; @@ -255,6 +270,68 @@ status = "disabled"; }; -+ ovl@14007000 { ++ ovl at 14007000 { + compatible = "mediatek,mt2701-disp-ovl"; + reg = <0 0x14007000 0 0x1000>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>; @@ -51,7 +51,7 @@ index 363de0d..7da9310 100644 + mediatek,larb = <&larb0>; + }; + -+ rdma0: rdma@14008000 { ++ rdma0: rdma at 14008000 { + compatible = "mediatek,mt2701-disp-rdma"; + reg = <0 0x14008000 0 0x1000>; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; @@ -60,7 +60,7 @@ index 363de0d..7da9310 100644 + mediatek,larb = <&larb0>; + }; + -+ wdma@14009000 { ++ wdma at 14009000 { + compatible = "mediatek,mt2701-disp-wdma"; + reg = <0 0x14009000 0 0x1000>; + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>; @@ -69,21 +69,21 @@ index 363de0d..7da9310 100644 + mediatek,larb = <&larb0>; + }; + -+ bls@1400a000 { ++ bls at 1400a000 { + compatible = "mediatek,mt2701-disp-pwm"; + reg = <0 0x1400a000 0 0x1000>; + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_BLS>; + }; + -+ color@1400b000 { ++ color at 1400b000 { + compatible = "mediatek,mt2701-disp-color"; + reg = <0 0x1400b000 0 0x1000>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_COLOR>; + }; + -+ dsi0: dsi@1400c000 { ++ dsi0: dsi at 1400c000 { + compatible = "mediatek,mt2701-dsi"; + reg = <0 0x1400c000 0 0x1000>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>; @@ -97,21 +97,21 @@ index 363de0d..7da9310 100644 + status = "disabled"; + }; + -+ mutex: mutex@1400e000 { ++ mutex: mutex at 1400e000 { + compatible = "mediatek,mt2701-disp-mutex"; + reg = <0 0x1400e000 0 0x1000>; + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_MUTEX_32K>; + }; + - larb0: larb@14010000 { + larb0: larb at 14010000 { compatible = "mediatek,mt2701-smi-larb"; reg = <0 0x14010000 0 0x1000>; @@ -265,6 +342,29 @@ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; }; -+ rdma1: rdma@14012000 { ++ rdma1: rdma at 14012000 { + compatible = "mediatek,mt2701-disp-rdma"; + reg = <0 0x14012000 0 0x1000>; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>; @@ -120,7 +120,7 @@ index 363de0d..7da9310 100644 + mediatek,larb = <&larb0>; + }; + -+ dpi0: dpi@14014000 { ++ dpi0: dpi at 14014000 { + compatible = "mediatek,mt2701-dpi"; + reg = <0 0x14014000 0 0x1000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; @@ -134,7 +134,7 @@ index 363de0d..7da9310 100644 + status = "disabled"; + }; + - imgsys: syscon@15000000 { + imgsys: syscon at 15000000 { compatible = "mediatek,mt2701-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; -- diff --git a/a/content_digest b/N1/content_digest index 3e8bb58..2cc37f5 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,30 +1,8 @@ "ref\01469698084-20185-1-git-send-email-yt.shen@mediatek.com\0" - "From\0YT Shen <yt.shen@mediatek.com>\0" + "From\0yt.shen@mediatek.com (YT Shen)\0" "Subject\0[PATCH v5 10/10] arm: dts: mt2701: Add display subsystem related nodes for MT2701\0" "Date\0Thu, 28 Jul 2016 17:28:04 +0800\0" - "To\0dri-devel@lists.freedesktop.org" - " Philipp Zabel <p.zabel@pengutronix.de>\0" - "Cc\0Rob Herring <robh+dt@kernel.org>" - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - Russell King <linux@arm.linux.org.uk> - David Airlie <airlied@linux.ie> - Matthias Brugger <matthias.bgg@gmail.com> - YT Shen <yt.shen@mediatek.com> - CK Hu <ck.hu@mediatek.com> - Mao Huang <littlecvr@chromium.org> - Bibby Hsieh <bibby.hsieh@mediatek.com> - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-mediatek@lists.infradead.org - srv_heupstream@mediatek.com - Sascha Hauer <kernel@pengutronix.de> - yingjoe.chen@mediatek.com - emil.l.velikov@gmail.com - " thierry.reding@gmail.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "This patch adds the device nodes for the DISP function blocks for MT2701\n" @@ -54,7 +32,7 @@ " \t\tpower-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;\n" " \t};\n" " \n" - "+\tmipi_tx0: mipi-dphy@10010000 {\n" + "+\tmipi_tx0: mipi-dphy at 10010000 {\n" "+\t\tcompatible = \"mediatek,mt2701-mipi-tx\";\n" "+\t\treg = <0 0x10010000 0 0x90>;\n" "+\t\tclocks = <&clk26m>;\n" @@ -64,14 +42,14 @@ "+\t\tstatus = \"disabled\";\n" "+\t};\n" "+\n" - " \tsysirq: interrupt-controller@10200100 {\n" + " \tsysirq: interrupt-controller at 10200100 {\n" " \t\tcompatible = \"mediatek,mt2701-sysirq\",\n" " \t\t\t \"mediatek,mt6577-sysirq\";\n" "@@ -255,6 +270,68 @@\n" " \t\tstatus = \"disabled\";\n" " \t};\n" " \n" - "+\tovl@14007000 {\n" + "+\tovl at 14007000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-ovl\";\n" "+\t\treg = <0 0x14007000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;\n" @@ -80,7 +58,7 @@ "+\t\tmediatek,larb = <&larb0>;\n" "+\t};\n" "+\n" - "+\trdma0: rdma@14008000 {\n" + "+\trdma0: rdma at 14008000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-rdma\";\n" "+\t\treg = <0 0x14008000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;\n" @@ -89,7 +67,7 @@ "+\t\tmediatek,larb = <&larb0>;\n" "+\t};\n" "+\n" - "+\twdma@14009000 {\n" + "+\twdma at 14009000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-wdma\";\n" "+\t\treg = <0 0x14009000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;\n" @@ -98,21 +76,21 @@ "+\t\tmediatek,larb = <&larb0>;\n" "+\t};\n" "+\n" - "+\tbls@1400a000 {\n" + "+\tbls at 1400a000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-pwm\";\n" "+\t\treg = <0 0x1400a000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_LOW>;\n" "+\t\tclocks = <&mmsys CLK_MM_DISP_BLS>;\n" "+\t};\n" "+\n" - "+\tcolor@1400b000 {\n" + "+\tcolor at 1400b000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-color\";\n" "+\t\treg = <0 0x1400b000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;\n" "+\t\tclocks = <&mmsys CLK_MM_DISP_COLOR>;\n" "+\t};\n" "+\n" - "+\tdsi0: dsi@1400c000 {\n" + "+\tdsi0: dsi at 1400c000 {\n" "+\t\tcompatible = \"mediatek,mt2701-dsi\";\n" "+\t\treg = <0 0x1400c000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;\n" @@ -126,21 +104,21 @@ "+\t\tstatus = \"disabled\";\n" "+\t};\n" "+\n" - "+\tmutex: mutex@1400e000 {\n" + "+\tmutex: mutex at 1400e000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-mutex\";\n" "+\t\treg = <0 0x1400e000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;\n" "+\t\tclocks = <&mmsys CLK_MM_MUTEX_32K>;\n" "+\t};\n" "+\n" - " \tlarb0: larb@14010000 {\n" + " \tlarb0: larb at 14010000 {\n" " \t\tcompatible = \"mediatek,mt2701-smi-larb\";\n" " \t\treg = <0 0x14010000 0 0x1000>;\n" "@@ -265,6 +342,29 @@\n" " \t\tpower-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;\n" " \t};\n" " \n" - "+\trdma1: rdma@14012000 {\n" + "+\trdma1: rdma at 14012000 {\n" "+\t\tcompatible = \"mediatek,mt2701-disp-rdma\";\n" "+\t\treg = <0 0x14012000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;\n" @@ -149,7 +127,7 @@ "+\t\tmediatek,larb = <&larb0>;\n" "+\t};\n" "+\n" - "+\tdpi0: dpi@14014000 {\n" + "+\tdpi0: dpi at 14014000 {\n" "+\t\tcompatible = \"mediatek,mt2701-dpi\";\n" "+\t\treg = <0 0x14014000 0 0x1000>;\n" "+\t\tinterrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;\n" @@ -163,10 +141,10 @@ "+\t\tstatus = \"disabled\";\n" "+\t};\n" "+\n" - " \timgsys: syscon@15000000 {\n" + " \timgsys: syscon at 15000000 {\n" " \t\tcompatible = \"mediatek,mt2701-imgsys\", \"syscon\";\n" " \t\treg = <0 0x15000000 0 0x1000>;\n" "-- \n" 1.7.9.5 -da335f5fa09cd0e47479b33703ba6861604ba55cba7503337895c87556543473 +a725e996f160d31a4aad21598ce251e307f658c27f6f1adf5d1700c7578389b1
diff --git a/a/content_digest b/N2/content_digest index 3e8bb58..b839518 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,7 +2,7 @@ "From\0YT Shen <yt.shen@mediatek.com>\0" "Subject\0[PATCH v5 10/10] arm: dts: mt2701: Add display subsystem related nodes for MT2701\0" "Date\0Thu, 28 Jul 2016 17:28:04 +0800\0" - "To\0dri-devel@lists.freedesktop.org" + "To\0<dri-devel@lists.freedesktop.org>" " Philipp Zabel <p.zabel@pengutronix.de>\0" "Cc\0Rob Herring <robh+dt@kernel.org>" Pawel Moll <pawel.moll@arm.com> @@ -16,15 +16,15 @@ CK Hu <ck.hu@mediatek.com> Mao Huang <littlecvr@chromium.org> Bibby Hsieh <bibby.hsieh@mediatek.com> - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-mediatek@lists.infradead.org - srv_heupstream@mediatek.com + <devicetree@vger.kernel.org> + <linux-kernel@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + <linux-mediatek@lists.infradead.org> + <srv_heupstream@mediatek.com> Sascha Hauer <kernel@pengutronix.de> - yingjoe.chen@mediatek.com - emil.l.velikov@gmail.com - " thierry.reding@gmail.com\0" + <yingjoe.chen@mediatek.com> + <emil.l.velikov@gmail.com> + " <thierry.reding@gmail.com>\0" "\00:1\0" "b\0" "This patch adds the device nodes for the DISP function blocks for MT2701\n" @@ -169,4 +169,4 @@ "-- \n" 1.7.9.5 -da335f5fa09cd0e47479b33703ba6861604ba55cba7503337895c87556543473 +f4f62d202ecbe67ad545f9b811320715bb4511676b84a1fe13a014b018cca5c9
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