Re: [Qemu-devel] [PATCH 28/32] ppc: Avoid double translation for lvx/lvxl/stvx/stvxl

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Fri, 2016-07-29 at 09:46 +0530, Richard Henderson wrote:
> 
> But that doesn't yet make the leap to 128-bit types in tcg.
> I was going to raise that topic during the 2.8 cycle, since as a
> consequence I want to drop support for 32-bit hosts, at least for 64-
> bit guests, and maybe entirely.

I wonder (or is it too chancy ?) if it's worthwhile having a TCG
ops that in effect does a translate and returns a host pointer...

That or a slightly more convoluted way of asking the backend to
produce a series of load/stores. We can provide the element size
(so it can do byteswap) and the base reg. Maybe a stride too.

We can have a default impl that turns it into a loop of existing
load/stores and smart backends can check for page boundaries
and limit the translations.

That would allow a much more efficient implementation for example
of ppc store/load multiplem which are heavily used by 32-bit guest
code for example.

Cheers,
Ben.