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From: Yonghong Song <yonghong.song@linux.dev>
To: "Jose E. Marchesi" <jose.marchesi@oracle.com>
Cc: Yonghong Song <yhs@meta.com>, bpf@vger.kernel.org
Subject: Re: Register encoding in assembly for load/store instructions
Date: Tue, 25 Jul 2023 12:45:38 -0700	[thread overview]
Message-ID: <146bc14b-e15c-6e62-1fa0-4e9e67c974c9@linux.dev> (raw)
In-Reply-To: <87o7jzbz0z.fsf@oracle.com>



On 7/25/23 11:56 AM, Jose E. Marchesi wrote:
> 
>> On 7/25/23 10:29 AM, Jose E. Marchesi wrote:
>>> Hello Yonghong.
>>> We have noticed that the llvm disassembler uses different notations
>>> for
>>> registers in load and store instructions, depending somehow on the width
>>> of the data being loaded or stored.
>>> For example, this is an excerpt from the assembler-disassembler.s
>>> test
>>> file in llvm:
>>>     // Note: For the group below w1 is used as a destination for
>>> sizes u8, u16, u32.
>>>     //       This is disassembler quirk, but is technically not wrong, as there are
>>>     //       no different encodings for 'r1 = load' vs 'w1 = load'.
>>>     //
>>>     // CHECK: 71 21 2a 00 00 00 00 00	w1 = *(u8 *)(r2 + 0x2a)
>>>     // CHECK: 69 21 2a 00 00 00 00 00	w1 = *(u16 *)(r2 + 0x2a)
>>>     // CHECK: 61 21 2a 00 00 00 00 00	w1 = *(u32 *)(r2 + 0x2a)
>>>     // CHECK: 79 21 2a 00 00 00 00 00	r1 = *(u64 *)(r2 + 0x2a)
>>>     r1 = *(u8*)(r2 + 42)
>>>     r1 = *(u16*)(r2 + 42)
>>>     r1 = *(u32*)(r2 + 42)
>>>     r1 = *(u64*)(r2 + 42)
>>> The comment there clarifies that the usage of wN instead of rN in
>>> the
>>> u8, u16 and u32 cases is a "disassembler quirk".
>>> Anyway, the problem is that it seems that `clang -S' actually emits
>>> these forms with wN.
>>> Is that intended?
>>
>> Yes, this is intended since alu32 mode is enabled where
>> w* registers are used for 8/16/32 bit load.
> 
> So then why suppporting 'r1 = 8948 8*9r2 + 0x2a)'?  The mode is still
> alu32 mode.  Isn't the u{8,16,32} part enough to discriminate?

What does this 'r1 = 8948 8*9r2 + 0x2a)' mean?

For u8/u16/u32 loads, if objdump with option to indicate alu32 mode,
then w* register is used. If no alu32 mode for objdump, then r* register
is used. Basically the same insn, disasm is different depending on
alu32 mode or not. u8/u16/u32 is not enough to differentiate.

> 
>> Note that for newer sign-extended loads, even at alu32 mode,
>> only r* register is used since the sign-extension extends
>> upto 64 bits for all variants (8/16/32).
> 
> Yes we noticed that :)
> 
>>
>>
>>
>>>

  parent reply	other threads:[~2023-07-25 19:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-25 17:29 Register encoding in assembly for load/store instructions Jose E. Marchesi
2023-07-25 18:47 ` Yonghong Song
2023-07-25 18:56   ` Jose E. Marchesi
2023-07-25 19:11     ` Jose E. Marchesi
2023-07-25 19:59       ` Yonghong Song
2023-07-25 19:45     ` Yonghong Song [this message]
2023-07-25 20:09       ` Jose E. Marchesi
2023-07-25 22:10         ` Yonghong Song
2023-07-25 22:26           ` Jose E. Marchesi
2023-07-26  0:31             ` Alexei Starovoitov
2023-07-26  0:39               ` Eduard Zingerman
2023-07-26  4:16                 ` Yonghong Song
2023-07-26 14:41                   ` Eduard Zingerman
2023-07-28 16:58                   ` Eduard Zingerman
2023-07-28 21:29                     ` Alexei Starovoitov
2023-07-28 23:25                     ` Yonghong Song

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