From mboxrd@z Thu Jan 1 00:00:00 1970 From: YT Shen Subject: Re: [PATCH v6 10/10] arm: dts: mt2701: Add display subsystem related nodes for MT2701 Date: Wed, 10 Aug 2016 15:32:37 +0800 Message-ID: <1470814357.27526.20.camel@mtksdaap41> References: <1470308844-20895-1-git-send-email-yt.shen@mediatek.com> <1470308844-20895-11-git-send-email-yt.shen@mediatek.com> <1470377906.16554.23.camel@mtksdaap41> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1470377906.16554.23.camel@mtksdaap41> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: CK Hu Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , Pawel Moll , Ian Campbell , emil.l.velikov@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Mao Huang , srv_heupstream@mediatek.com, Rob Herring , linux-mediatek@lists.infradead.org, Kumar Gala , Matthias Brugger , yingjoe.chen@mediatek.com, Sascha Hauer , linux-arm-kernel@lists.infradead.org List-Id: linux-mediatek@lists.infradead.org SGkgQ0ssCgpPbiBGcmksIDIwMTYtMDgtMDUgYXQgMTQ6MTggKzA4MDAsIENLIEh1IHdyb3RlOgo+ IEhpLCBZVDoKPiAKPiBPbiBUaHUsIDIwMTYtMDgtMDQgYXQgMTk6MDcgKzA4MDAsIFlUIFNoZW4g d3JvdGU6Cj4gPiBUaGlzIHBhdGNoIGFkZHMgdGhlIGRldmljZSBub2RlcyBmb3IgdGhlIERJU1Ag ZnVuY3Rpb24gYmxvY2tzIGZvciBNVDI3MDEKPiA+IAo+ID4gU2lnbmVkLW9mZi1ieTogWVQgU2hl biA8eXQuc2hlbkBtZWRpYXRlay5jb20+Cj4gPiAtLS0KPiA+ICBhcmNoL2FybS9ib290L2R0cy9t dDI3MDEuZHRzaSB8ICAgODYgKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysr KysKPiA+ICAxIGZpbGUgY2hhbmdlZCwgODYgaW5zZXJ0aW9ucygrKQo+ID4gCj4gPiBkaWZmIC0t Z2l0IGEvYXJjaC9hcm0vYm9vdC9kdHMvbXQyNzAxLmR0c2kgYi9hcmNoL2FybS9ib290L2R0cy9t dDI3MDEuZHRzaQo+ID4gaW5kZXggZjMxMzZiZC4uOGYzNWEwZCAxMDA2NDQKPiA+IC0tLSBhL2Fy Y2gvYXJtL2Jvb3QvZHRzL210MjcwMS5kdHNpCj4gPiArKysgYi9hcmNoL2FybS9ib290L2R0cy9t dDI3MDEuZHRzaQo+ID4gQEAgLTI0LDYgKzI0LDExIEBACj4gPiAgCWNvbXBhdGlibGUgPSAibWVk aWF0ZWssbXQyNzAxIjsKPiA+ICAJaW50ZXJydXB0LXBhcmVudCA9IDwmc3lzaXJxPjsKPiA+ICAK PiA+ICsJYWxpYXNlcyB7Cj4gPiArCQlyZG1hMCA9ICZyZG1hMDsKPiA+ICsJCXJkbWExID0gJnJk bWExOwo+ID4gKwl9Owo+ID4gKwo+ID4gIAljcHVzIHsKPiA+ICAJCSNhZGRyZXNzLWNlbGxzID0g PDE+Owo+ID4gIAkJI3NpemUtY2VsbHMgPSA8MD47Cj4gPiBAQCAtMTcxLDYgKzE3NiwxNiBAQAo+ ID4gIAkJcG93ZXItZG9tYWlucyA9IDwmc2Nwc3lzIE1UMjcwMV9QT1dFUl9ET01BSU5fRElTUD47 Cj4gPiAgCX07Cj4gPiAgCj4gPiArCW1pcGlfdHgwOiBtaXBpLWRwaHlAMTAwMTAwMDAgewo+ID4g KwkJY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDI3MDEtbWlwaS10eCI7Cj4gPiArCQlyZWcgPSA8 MCAweDEwMDEwMDAwIDAgMHg5MD47Cj4gPiArCQljbG9ja3MgPSA8JmNsazI2bT47Cj4gPiArCQlj bG9jay1vdXRwdXQtbmFtZXMgPSAibWlwaV90eDBfcGxsIjsKPiA+ICsJCSNjbG9jay1jZWxscyA9 IDwwPjsKPiA+ICsJCSNwaHktY2VsbHMgPSA8MD47Cj4gPiArCQlzdGF0dXMgPSAiZGlzYWJsZWQi Owo+ID4gKwl9Owo+ID4gKwo+ID4gIAlzeXNpcnE6IGludGVycnVwdC1jb250cm9sbGVyQDEwMjAw MTAwIHsKPiA+ICAJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQyNzAxLXN5c2lycSIsCj4gPiAg CQkJICAgICAibWVkaWF0ZWssbXQ2NTc3LXN5c2lycSI7Cj4gPiBAQCAtMjU1LDYgKzI3MCw2OCBA QAo+ID4gIAkJc3RhdHVzID0gImRpc2FibGVkIjsKPiA+ICAJfTsKPiA+ICAKPiA+ICsJb3ZsQDE0 MDA3MDAwIHsKPiA+ICsJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQyNzAxLWRpc3Atb3ZsIjsK PiA+ICsJCXJlZyA9IDwwIDB4MTQwMDcwMDAgMCAweDEwMDA+Owo+ID4gKwkJaW50ZXJydXB0cyA9 IDxHSUNfU1BJIDE1MyBJUlFfVFlQRV9MRVZFTF9MT1c+Owo+ID4gKwkJY2xvY2tzID0gPCZtbXN5 cyBDTEtfTU1fRElTUF9PVkw+Owo+ID4gKwkJaW9tbXVzID0gPCZpb21tdSBNVDI3MDFfTTRVX1BP UlRfRElTUF9PVkxfMD47Cj4gPiArCQltZWRpYXRlayxsYXJiID0gPCZsYXJiMD47Cj4gPiArCX07 Cj4gPiArCj4gPiArCXJkbWEwOiByZG1hQDE0MDA4MDAwIHsKPiA+ICsJCWNvbXBhdGlibGUgPSAi bWVkaWF0ZWssbXQyNzAxLWRpc3AtcmRtYSI7Cj4gPiArCQlyZWcgPSA8MCAweDE0MDA4MDAwIDAg MHgxMDAwPjsKPiA+ICsJCWludGVycnVwdHMgPSA8R0lDX1NQSSAxNTIgSVJRX1RZUEVfTEVWRUxf TE9XPjsKPiA+ICsJCWNsb2NrcyA9IDwmbW1zeXMgQ0xLX01NX0RJU1BfUkRNQT47Cj4gPiArCQlp b21tdXMgPSA8JmlvbW11IE1UMjcwMV9NNFVfUE9SVF9ESVNQX1JETUE+Owo+ID4gKwkJbWVkaWF0 ZWssbGFyYiA9IDwmbGFyYjA+Owo+ID4gKwl9Owo+ID4gKwo+ID4gKwl3ZG1hQDE0MDA5MDAwIHsK PiA+ICsJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQyNzAxLWRpc3Atd2RtYSI7Cj4gPiArCQly ZWcgPSA8MCAweDE0MDA5MDAwIDAgMHgxMDAwPjsKPiA+ICsJCWludGVycnVwdHMgPSA8R0lDX1NQ SSAxNTQgSVJRX1RZUEVfTEVWRUxfTE9XPjsKPiA+ICsJCWNsb2NrcyA9IDwmbW1zeXMgQ0xLX01N X0RJU1BfV0RNQT47Cj4gPiArCQlpb21tdXMgPSA8JmlvbW11IE1UMjcwMV9NNFVfUE9SVF9ESVNQ X1dETUE+Owo+ID4gKwkJbWVkaWF0ZWssbGFyYiA9IDwmbGFyYjA+Owo+ID4gKwl9Owo+ID4gKwo+ ID4gKwlibHNAMTQwMGEwMDAgewo+ID4gKwkJY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDI3MDEt ZGlzcC1wd20iOwo+ID4gKwkJcmVnID0gPDAgMHgxNDAwYTAwMCAwIDB4MTAwMD47Cj4gPiArCQlp bnRlcnJ1cHRzID0gPEdJQ19TUEkgMTU1IElSUV9UWVBFX0xFVkVMX0xPVz47Cj4gPiArCQljbG9j a3MgPSA8Jm1tc3lzIENMS19NTV9ESVNQX0JMUz47Cj4gPiArCX07Cj4gCj4gWW91IGRlcGVuZHMg b24gWzFdLCBidXQgdGhhdCBzZXJpZXMgaW5jbHVkZSBbMl0gd2hpY2ggYWxzbyBhZGQgYQo+IGRp c3BfYmxzIG5vZGUgd2hpY2ggaGFzIHRoZSBzYW1lIGNvbXBhdGlibGUgc3RyaW5nCj4gIm1lZGlh dGVrLG10MjcwMS1kaXNwLXB3bSIuIElmIHRoZXNlIHR3byBub2RlIGFyZSB0aGUgc2FtZSwganVz dCBhZGQgaXQKPiBpbiBvbmUgcGF0Y2guIElmIHRoZXkgYXJlIGRpZmZlcmVudCwgZG8gbm90IHVz ZSB0aGUgc2FtZSBjb21wYXRpYmxlCj4gc3RyaW5nLgpXZSB3aWxsIHJlbW92ZSBpdCBpbiB0aGlz IHBhdGNoIHNlcmllcy4KClJlZ2FyZHMsCnl0LHNoZW4KCj4gCj4gWzFdIGh0dHBzOi8vcGF0Y2h3 b3JrLmtlcm5lbC5vcmcvcGF0Y2gvOTIyMjk5Ny8gKCJkdC1iaW5kaW5nczogcHdtOiBBZGQKPiBN ZWRpYVRlayBkaXNwbGF5IFBXTSBiaW5kaW5ncyIpCj4gWzJdIGh0dHBzOi8vcGF0Y2h3b3JrLmtl cm5lbC5vcmcvcGF0Y2gvOTIyMzAwNS8KPiA+ICsKPiA+ICsJY29sb3JAMTQwMGIwMDAgewo+ID4g KwkJY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDI3MDEtZGlzcC1jb2xvciI7Cj4gPiArCQlyZWcg PSA8MCAweDE0MDBiMDAwIDAgMHgxMDAwPjsKPiA+ICsJCWludGVycnVwdHMgPSA8R0lDX1NQSSAx NTYgSVJRX1RZUEVfTEVWRUxfTE9XPjsKPiA+ICsJCWNsb2NrcyA9IDwmbW1zeXMgQ0xLX01NX0RJ U1BfQ09MT1I+Owo+ID4gKwl9Owo+ID4gKwo+ID4gKwlkc2kwOiBkc2lAMTQwMGMwMDAgewo+ID4g KwkJY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDI3MDEtZHNpIjsKPiA+ICsJCXJlZyA9IDwwIDB4 MTQwMGMwMDAgMCAweDEwMDA+Owo+ID4gKwkJaW50ZXJydXB0cyA9IDxHSUNfU1BJIDE1NyBJUlFf VFlQRV9MRVZFTF9MT1c+Owo+ID4gKwkJY2xvY2tzID0gPCZtbXN5cyBDTEtfTU1fRFNJX0VOR0lO RT4sIDwmbW1zeXMgQ0xLX01NX0RTSV9ESUc+LAo+ID4gKwkJCSA8Jm1pcGlfdHgwPjsKPiA+ICsJ CWNsb2NrLW5hbWVzID0gImVuZ2luZSIsICJkaWdpdGFsIiwgImhzIjsKPiA+ICsJCW1lZGlhdGVr LHN5c2Nvbi1kc2kgPSA8Jm1tc3lzIDB4MTM4PjsKPiA+ICsJCW1lZGlhdGVrLHNzYy1yYW5nZSA9 IDw1PjsKPiA+ICsJCXBoeXMgPSA8Jm1pcGlfdHgwPjsKPiA+ICsJCXBoeS1uYW1lcyA9ICJkcGh5 IjsKPiA+ICsJCXN0YXR1cyA9ICJkaXNhYmxlZCI7Cj4gPiArCX07Cj4gPiArCj4gPiArCW11dGV4 OiBtdXRleEAxNDAwZTAwMCB7Cj4gPiArCQljb21wYXRpYmxlID0gIm1lZGlhdGVrLG10MjcwMS1k aXNwLW11dGV4IjsKPiA+ICsJCXJlZyA9IDwwIDB4MTQwMGUwMDAgMCAweDEwMDA+Owo+ID4gKwkJ aW50ZXJydXB0cyA9IDxHSUNfU1BJIDE2MSBJUlFfVFlQRV9MRVZFTF9MT1c+Owo+ID4gKwkJY2xv Y2tzID0gPCZtbXN5cyBDTEtfTU1fTVVURVhfMzJLPjsKPiA+ICsJfTsKPiA+ICsKPiA+ICAJbGFy YjA6IGxhcmJAMTQwMTAwMDAgewo+ID4gIAkJY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDI3MDEt c21pLWxhcmIiOwo+ID4gIAkJcmVnID0gPDAgMHgxNDAxMDAwMCAwIDB4MTAwMD47Cj4gPiBAQCAt MjY2LDYgKzM0MywxNSBAQAo+ID4gIAkJcG93ZXItZG9tYWlucyA9IDwmc2Nwc3lzIE1UMjcwMV9Q T1dFUl9ET01BSU5fRElTUD47Cj4gPiAgCX07Cj4gPiAgCj4gPiArCXJkbWExOiByZG1hQDE0MDEy MDAwIHsKPiA+ICsJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQyNzAxLWRpc3AtcmRtYSI7Cj4g PiArCQlyZWcgPSA8MCAweDE0MDEyMDAwIDAgMHgxMDAwPjsKPiA+ICsJCWludGVycnVwdHMgPSA8 R0lDX1NQSSAxNjQgSVJRX1RZUEVfTEVWRUxfTE9XPjsKPiA+ICsJCWNsb2NrcyA9IDwmbW1zeXMg Q0xLX01NX0RJU1BfUkRNQTE+Owo+ID4gKwkJaW9tbXVzID0gPCZpb21tdSBNVDI3MDFfTTRVX1BP UlRfRElTUF9SRE1BMT47Cj4gPiArCQltZWRpYXRlayxsYXJiID0gPCZsYXJiMD47Cj4gPiArCX07 Cj4gPiArCj4gPiAgCWltZ3N5czogc3lzY29uQDE1MDAwMDAwIHsKPiA+ICAJCWNvbXBhdGlibGUg PSAibWVkaWF0ZWssbXQyNzAxLWltZ3N5cyIsICJzeXNjb24iOwo+ID4gIAkJcmVnID0gPDAgMHgx NTAwMDAwMCAwIDB4MTAwMD47Cj4gCj4gUmVnYXJkcywKPiBDSwo+IAoKCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QK ZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9w Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: yt.shen@mediatek.com (YT Shen) Date: Wed, 10 Aug 2016 15:32:37 +0800 Subject: [PATCH v6 10/10] arm: dts: mt2701: Add display subsystem related nodes for MT2701 In-Reply-To: <1470377906.16554.23.camel@mtksdaap41> References: <1470308844-20895-1-git-send-email-yt.shen@mediatek.com> <1470308844-20895-11-git-send-email-yt.shen@mediatek.com> <1470377906.16554.23.camel@mtksdaap41> Message-ID: <1470814357.27526.20.camel@mtksdaap41> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi CK, On Fri, 2016-08-05 at 14:18 +0800, CK Hu wrote: > Hi, YT: > > On Thu, 2016-08-04 at 19:07 +0800, YT Shen wrote: > > This patch adds the device nodes for the DISP function blocks for MT2701 > > > > Signed-off-by: YT Shen > > --- > > arch/arm/boot/dts/mt2701.dtsi | 86 +++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 86 insertions(+) > > > > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi > > index f3136bd..8f35a0d 100644 > > --- a/arch/arm/boot/dts/mt2701.dtsi > > +++ b/arch/arm/boot/dts/mt2701.dtsi > > @@ -24,6 +24,11 @@ > > compatible = "mediatek,mt2701"; > > interrupt-parent = <&sysirq>; > > > > + aliases { > > + rdma0 = &rdma0; > > + rdma1 = &rdma1; > > + }; > > + > > cpus { > > #address-cells = <1>; > > #size-cells = <0>; > > @@ -171,6 +176,16 @@ > > power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; > > }; > > > > + mipi_tx0: mipi-dphy at 10010000 { > > + compatible = "mediatek,mt2701-mipi-tx"; > > + reg = <0 0x10010000 0 0x90>; > > + clocks = <&clk26m>; > > + clock-output-names = "mipi_tx0_pll"; > > + #clock-cells = <0>; > > + #phy-cells = <0>; > > + status = "disabled"; > > + }; > > + > > sysirq: interrupt-controller at 10200100 { > > compatible = "mediatek,mt2701-sysirq", > > "mediatek,mt6577-sysirq"; > > @@ -255,6 +270,68 @@ > > status = "disabled"; > > }; > > > > + ovl at 14007000 { > > + compatible = "mediatek,mt2701-disp-ovl"; > > + reg = <0 0x14007000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DISP_OVL>; > > + iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>; > > + mediatek,larb = <&larb0>; > > + }; > > + > > + rdma0: rdma at 14008000 { > > + compatible = "mediatek,mt2701-disp-rdma"; > > + reg = <0 0x14008000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DISP_RDMA>; > > + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>; > > + mediatek,larb = <&larb0>; > > + }; > > + > > + wdma at 14009000 { > > + compatible = "mediatek,mt2701-disp-wdma"; > > + reg = <0 0x14009000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DISP_WDMA>; > > + iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>; > > + mediatek,larb = <&larb0>; > > + }; > > + > > + bls at 1400a000 { > > + compatible = "mediatek,mt2701-disp-pwm"; > > + reg = <0 0x1400a000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DISP_BLS>; > > + }; > > You depends on [1], but that series include [2] which also add a > disp_bls node which has the same compatible string > "mediatek,mt2701-disp-pwm". If these two node are the same, just add it > in one patch. If they are different, do not use the same compatible > string. We will remove it in this patch series. Regards, yt,shen > > [1] https://patchwork.kernel.org/patch/9222997/ ("dt-bindings: pwm: Add > MediaTek display PWM bindings") > [2] https://patchwork.kernel.org/patch/9223005/ > > + > > + color at 1400b000 { > > + compatible = "mediatek,mt2701-disp-color"; > > + reg = <0 0x1400b000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DISP_COLOR>; > > + }; > > + > > + dsi0: dsi at 1400c000 { > > + compatible = "mediatek,mt2701-dsi"; > > + reg = <0 0x1400c000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DSI_ENGINE>, <&mmsys CLK_MM_DSI_DIG>, > > + <&mipi_tx0>; > > + clock-names = "engine", "digital", "hs"; > > + mediatek,syscon-dsi = <&mmsys 0x138>; > > + mediatek,ssc-range = <5>; > > + phys = <&mipi_tx0>; > > + phy-names = "dphy"; > > + status = "disabled"; > > + }; > > + > > + mutex: mutex at 1400e000 { > > + compatible = "mediatek,mt2701-disp-mutex"; > > + reg = <0 0x1400e000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_MUTEX_32K>; > > + }; > > + > > larb0: larb at 14010000 { > > compatible = "mediatek,mt2701-smi-larb"; > > reg = <0 0x14010000 0 0x1000>; > > @@ -266,6 +343,15 @@ > > power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; > > }; > > > > + rdma1: rdma at 14012000 { > > + compatible = "mediatek,mt2701-disp-rdma"; > > + reg = <0 0x14012000 0 0x1000>; > > + interrupts = ; > > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > > + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>; > > + mediatek,larb = <&larb0>; > > + }; > > + > > imgsys: syscon at 15000000 { > > compatible = "mediatek,mt2701-imgsys", "syscon"; > > reg = <0 0x15000000 0 0x1000>; > > Regards, > CK >