diff for duplicates of <1471353666.1562.3.camel@synopsys.com> diff --git a/a/1.txt b/N1/1.txt index 0083bf3..e6565a6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -On Fri, 2016-08-12@19:01 +0300, Andy Shevchenko wrote: +On Fri, 2016-08-12 at 19:01 +0300, Andy Shevchenko wrote: > There are at least two known devices, e.g. DMA controller found on > ARC AXS101 > SDP board, that have LLP register and no multi block transfer support @@ -7,22 +7,22 @@ On Fri, 2016-08-12@19:01 +0300, Andy Shevchenko wrote: > > Override autodetection by user provided data. > -> Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com> -> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> +> Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> +> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > --- -> ?drivers/dma/dw/core.c????????????????| 6 +----- -> ?include/linux/platform_data/dma-dw.h | 2 ++ -> ?2 files changed, 3 insertions(+), 5 deletions(-) +> drivers/dma/dw/core.c | 6 +----- +> include/linux/platform_data/dma-dw.h | 2 ++ +> 2 files changed, 3 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c > index 80e7421..da18b18 100644 > --- a/drivers/dma/dw/core.c > +++ b/drivers/dma/dw/core.c > @@ -1571,11 +1571,7 @@ int dw_dma_probe(struct dw_dma_chip *chip) -> ? (dwc_params >> DWC_PARAMS_MBLK_EN & +> (dwc_params >> DWC_PARAMS_MBLK_EN & > 0x1) == 0; -> ? } else { -> ? dwc->block_size = pdata->block_size; +> } else { +> dwc->block_size = pdata->block_size; > - > - /* Check if channel supports multi block > transfer */ @@ -32,36 +32,36 @@ On Fri, 2016-08-12@19:01 +0300, Andy Shevchenko wrote: > LLP)) == 0; > - channel_writel(dwc, LLP, 0); > + dwc->nollp = pdata->is_nollp; -> ? } -> ? } -> ? +> } +> } +> > diff --git a/include/linux/platform_data/dma-dw.h > b/include/linux/platform_data/dma-dw.h > index 4636c93..5f0e11e 100644 > --- a/include/linux/platform_data/dma-dw.h > +++ b/include/linux/platform_data/dma-dw.h > @@ -40,6 +40,7 @@ struct dw_dma_slave { -> ? * @is_private: The device channels should be marked as private and +> * @is_private: The device channels should be marked as private and > not for -> ? * by the general purpose DMA channel allocator. -> ? * @is_memcpy: The device channels do support memory-to-memory +> * by the general purpose DMA channel allocator. +> * @is_memcpy: The device channels do support memory-to-memory > transfers. > + * @is_nollp: The device channels does not support multi block > transfers. -> ? * @chan_allocation_order: Allocate channels starting from 0 or 7 -> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7 +> * @chan_allocation_order: Allocate channels starting from 0 or 7 +> * @chan_priority: Set channel priority increasing from 0 to 7 or 7 > to 0. -> ? * @block_size: Maximum block size supported by the controller +> * @block_size: Maximum block size supported by the controller > @@ -51,6 +52,7 @@ struct dw_dma_platform_data { -> ? unsigned int nr_channels; -> ? bool is_private; -> ? bool is_memcpy; +> unsigned int nr_channels; +> bool is_private; +> bool is_memcpy; > + bool is_nollp; -> ?#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven +> #define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven > */ -> ?#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero +> #define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero > */ -> ? unsigned char chan_allocation_order; +> unsigned char chan_allocation_order; Looks good to me. -Reviewed-by: Eugeniy Platsev <Eugeniy.Paltsev at synopsys.com> +Reviewed-by: Eugeniy Platsev <Eugeniy.Paltsev@synopsys.com> diff --git a/a/content_digest b/N1/content_digest index a736d54..1f46040 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,12 +1,23 @@ "ref\01471017716-44893-1-git-send-email-andriy.shevchenko@linux.intel.com\0" "ref\01471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com\0" - "From\0Eugeniy.Paltsev@synopsys.com (Eugeniy Paltsev)\0" - "Subject\0[PATCH v10 03/11] dmaengine: dw: override LLP support if asked in platform data\0" + "From\0Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\0" + "Subject\0Re: [PATCH v10 03/11] dmaengine: dw: override LLP support if asked in platform data\0" "Date\0Tue, 16 Aug 2016 13:21:06 +0000\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0andriy.shevchenko@linux.intel.com <andriy.shevchenko@linux.intel.com>\0" + "Cc\0ismo.puustinen@intel.com <ismo.puustinen@intel.com>" + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + vinod.koul@intel.com <vinod.koul@intel.com> + heikki.krogerus@linux.intel.com <heikki.krogerus@linux.intel.com> + Eugeniy.Paltsev@synopsys.com <Eugeniy.Paltsev@synopsys.com> + linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org> + dmaengine@vger.kernel.org <dmaengine@vger.kernel.org> + linux-serial@vger.kernel.org <linux-serial@vger.kernel.org> + gregkh@linuxfoundation.org <gregkh@linuxfoundation.org> + peter@hurleysoftware.com <peter@hurleysoftware.com> + " pure.logic@nexus-software.ie <pure.logic@nexus-software.ie>\0" "\00:1\0" "b\0" - "On Fri, 2016-08-12@19:01 +0300, Andy Shevchenko wrote:\n" + "On Fri, 2016-08-12 at 19:01 +0300, Andy Shevchenko wrote:\n" "> There are at least two known devices, e.g. DMA controller found on\n" "> ARC AXS101\n" "> SDP board, that have LLP register and no multi block transfer support\n" @@ -15,22 +26,22 @@ "> \n" "> Override autodetection by user provided data.\n" "> \n" - "> Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>\n" - "> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "> Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\n" + "> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" "> ---\n" - "> ?drivers/dma/dw/core.c????????????????| 6 +-----\n" - "> ?include/linux/platform_data/dma-dw.h | 2 ++\n" - "> ?2 files changed, 3 insertions(+), 5 deletions(-)\n" + "> \302\240drivers/dma/dw/core.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 6 +-----\n" + "> \302\240include/linux/platform_data/dma-dw.h | 2 ++\n" + "> \302\2402 files changed, 3 insertions(+), 5 deletions(-)\n" "> \n" "> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c\n" "> index 80e7421..da18b18 100644\n" "> --- a/drivers/dma/dw/core.c\n" "> +++ b/drivers/dma/dw/core.c\n" "> @@ -1571,11 +1571,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n" - "> ?\t\t\t\t(dwc_params >> DWC_PARAMS_MBLK_EN &\n" + "> \302\240\t\t\t\t(dwc_params >> DWC_PARAMS_MBLK_EN &\n" "> 0x1) == 0;\n" - "> ?\t\t} else {\n" - "> ?\t\t\tdwc->block_size = pdata->block_size;\n" + "> \302\240\t\t} else {\n" + "> \302\240\t\t\tdwc->block_size = pdata->block_size;\n" "> -\n" "> -\t\t\t/* Check if channel supports multi block\n" "> transfer */\n" @@ -40,38 +51,38 @@ "> LLP)) == 0;\n" "> -\t\t\tchannel_writel(dwc, LLP, 0);\n" "> +\t\t\tdwc->nollp = pdata->is_nollp;\n" - "> ?\t\t}\n" - "> ?\t}\n" - "> ?\n" + "> \302\240\t\t}\n" + "> \302\240\t}\n" + "> \302\240\n" "> diff --git a/include/linux/platform_data/dma-dw.h\n" "> b/include/linux/platform_data/dma-dw.h\n" "> index 4636c93..5f0e11e 100644\n" "> --- a/include/linux/platform_data/dma-dw.h\n" "> +++ b/include/linux/platform_data/dma-dw.h\n" "> @@ -40,6 +40,7 @@ struct dw_dma_slave {\n" - "> ? * @is_private: The device channels should be marked as private and\n" + "> \302\240 * @is_private: The device channels should be marked as private and\n" "> not for\n" - "> ? *\tby the general purpose DMA channel allocator.\n" - "> ? * @is_memcpy: The device channels do support memory-to-memory\n" + "> \302\240 *\tby the general purpose DMA channel allocator.\n" + "> \302\240 * @is_memcpy: The device channels do support memory-to-memory\n" "> transfers.\n" "> + * @is_nollp: The device channels does not support multi block\n" "> transfers.\n" - "> ? * @chan_allocation_order: Allocate channels starting from 0 or 7\n" - "> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n" + "> \302\240 * @chan_allocation_order: Allocate channels starting from 0 or 7\n" + "> \302\240 * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n" "> to 0.\n" - "> ? * @block_size: Maximum block size supported by the controller\n" + "> \302\240 * @block_size: Maximum block size supported by the controller\n" "> @@ -51,6 +52,7 @@ struct dw_dma_platform_data {\n" - "> ?\tunsigned int\tnr_channels;\n" - "> ?\tbool\t\tis_private;\n" - "> ?\tbool\t\tis_memcpy;\n" + "> \302\240\tunsigned int\tnr_channels;\n" + "> \302\240\tbool\t\tis_private;\n" + "> \302\240\tbool\t\tis_memcpy;\n" "> +\tbool\t\tis_nollp;\n" - "> ?#define CHAN_ALLOCATION_ASCENDING\t0\t/* zero to seven\n" + "> \302\240#define CHAN_ALLOCATION_ASCENDING\t0\t/* zero to seven\n" "> */\n" - "> ?#define CHAN_ALLOCATION_DESCENDING\t1\t/* seven to zero\n" + "> \302\240#define CHAN_ALLOCATION_DESCENDING\t1\t/* seven to zero\n" "> */\n" - "> ?\tunsigned char\tchan_allocation_order;\n" + "> \302\240\tunsigned char\tchan_allocation_order;\n" "\n" "Looks good to me.\n" - Reviewed-by: Eugeniy Platsev <Eugeniy.Paltsev at synopsys.com> + Reviewed-by: Eugeniy Platsev <Eugeniy.Paltsev@synopsys.com> -fe841ddb21355c1f7e001182a7b3dcf4b575e7f5255f399599521bad18e28606 +c61a55af9e51f90655a38b134185a5af765fc1cab839587e36ac7ff83f56d877
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