From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeniy.Paltsev@synopsys.com (Eugeniy Paltsev) Date: Tue, 16 Aug 2016 13:21:06 +0000 Subject: [PATCH v10 03/11] dmaengine: dw: override LLP support if asked in platform data In-Reply-To: <1471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com> References: <1471017716-44893-1-git-send-email-andriy.shevchenko@linux.intel.com> <1471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com> List-ID: Message-ID: <1471353666.1562.3.camel@synopsys.com> To: linux-snps-arc@lists.infradead.org On Fri, 2016-08-12@19:01 +0300, Andy Shevchenko wrote: > There are at least two known devices, e.g. DMA controller found on > ARC AXS101 > SDP board, that have LLP register and no multi block transfer support > at the > same time. > > Override autodetection by user provided data. > > Reported-by: Eugeniy Paltsev > Signed-off-by: Andy Shevchenko > --- > ?drivers/dma/dw/core.c????????????????| 6 +----- > ?include/linux/platform_data/dma-dw.h | 2 ++ > ?2 files changed, 3 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c > index 80e7421..da18b18 100644 > --- a/drivers/dma/dw/core.c > +++ b/drivers/dma/dw/core.c > @@ -1571,11 +1571,7 @@ int dw_dma_probe(struct dw_dma_chip *chip) > ? (dwc_params >> DWC_PARAMS_MBLK_EN & > 0x1) == 0; > ? } else { > ? dwc->block_size = pdata->block_size; > - > - /* Check if channel supports multi block > transfer */ > - channel_writel(dwc, LLP, > DWC_LLP_LOC(0xffffffff)); > - dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, > LLP)) == 0; > - channel_writel(dwc, LLP, 0); > + dwc->nollp = pdata->is_nollp; > ? } > ? } > ? > diff --git a/include/linux/platform_data/dma-dw.h > b/include/linux/platform_data/dma-dw.h > index 4636c93..5f0e11e 100644 > --- a/include/linux/platform_data/dma-dw.h > +++ b/include/linux/platform_data/dma-dw.h > @@ -40,6 +40,7 @@ struct dw_dma_slave { > ? * @is_private: The device channels should be marked as private and > not for > ? * by the general purpose DMA channel allocator. > ? * @is_memcpy: The device channels do support memory-to-memory > transfers. > + * @is_nollp: The device channels does not support multi block > transfers. > ? * @chan_allocation_order: Allocate channels starting from 0 or 7 > ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7 > to 0. > ? * @block_size: Maximum block size supported by the controller > @@ -51,6 +52,7 @@ struct dw_dma_platform_data { > ? unsigned int nr_channels; > ? bool is_private; > ? bool is_memcpy; > + bool is_nollp; > ?#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven > */ > ?#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero > */ > ? unsigned char chan_allocation_order; Looks good to me. Reviewed-by: Eugeniy Platsev From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeniy Paltsev Subject: Re: [PATCH v10 03/11] dmaengine: dw: override LLP support if asked in platform data Date: Tue, 16 Aug 2016 13:21:06 +0000 Message-ID: <1471353666.1562.3.camel@synopsys.com> References: <1471017716-44893-1-git-send-email-andriy.shevchenko@linux.intel.com> <1471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com> Content-Language: en-US Content-ID: Sender: linux-kernel-owner@vger.kernel.org To: "andriy.shevchenko@linux.intel.com" Cc: "ismo.puustinen@intel.com" , "linux-kernel@vger.kernel.org" , "vinod.koul@intel.com" , "heikki.krogerus@linux.intel.com" , "Eugeniy.Paltsev@synopsys.com" , "linux-snps-arc@lists.infradead.org" , "dmaengine@vger.kernel.org" , "linux-serial@vger.kernel.org" , "gregkh@linuxfoundation.org" , "peter@hurleysoftware.com" , "pure.logic@nexus-software.ie" List-Id: linux-serial@vger.kernel.org T24gRnJpLCAyMDE2LTA4LTEyIGF0IDE5OjAxICswMzAwLCBBbmR5IFNoZXZjaGVua28gd3JvdGU6 DQo+IFRoZXJlIGFyZSBhdCBsZWFzdCB0d28ga25vd24gZGV2aWNlcywgZS5nLiBETUEgY29udHJv bGxlciBmb3VuZCBvbg0KPiBBUkMgQVhTMTAxDQo+IFNEUCBib2FyZCwgdGhhdCBoYXZlIExMUCBy ZWdpc3RlciBhbmQgbm8gbXVsdGkgYmxvY2sgdHJhbnNmZXIgc3VwcG9ydA0KPiBhdCB0aGUNCj4g c2FtZSB0aW1lLg0KPiANCj4gT3ZlcnJpZGUgYXV0b2RldGVjdGlvbiBieSB1c2VyIHByb3ZpZGVk IGRhdGEuDQo+IA0KPiBSZXBvcnRlZC1ieTogRXVnZW5peSBQYWx0c2V2IDxFdWdlbml5LlBhbHRz ZXZAc3lub3BzeXMuY29tPg0KPiBTaWduZWQtb2ZmLWJ5OiBBbmR5IFNoZXZjaGVua28gPGFuZHJp eS5zaGV2Y2hlbmtvQGxpbnV4LmludGVsLmNvbT4NCj4gLS0tDQo+IMKgZHJpdmVycy9kbWEvZHcv Y29yZS5jwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqB8IDYgKy0tLS0tDQo+IMKgaW5j bHVkZS9saW51eC9wbGF0Zm9ybV9kYXRhL2RtYS1kdy5oIHwgMiArKw0KPiDCoDIgZmlsZXMgY2hh bmdlZCwgMyBpbnNlcnRpb25zKCspLCA1IGRlbGV0aW9ucygtKQ0KPiANCj4gZGlmZiAtLWdpdCBh L2RyaXZlcnMvZG1hL2R3L2NvcmUuYyBiL2RyaXZlcnMvZG1hL2R3L2NvcmUuYw0KPiBpbmRleCA4 MGU3NDIxLi5kYTE4YjE4IDEwMDY0NA0KPiAtLS0gYS9kcml2ZXJzL2RtYS9kdy9jb3JlLmMNCj4g KysrIGIvZHJpdmVycy9kbWEvZHcvY29yZS5jDQo+IEBAIC0xNTcxLDExICsxNTcxLDcgQEAgaW50 IGR3X2RtYV9wcm9iZShzdHJ1Y3QgZHdfZG1hX2NoaXAgKmNoaXApDQo+IMKgCQkJCShkd2NfcGFy YW1zID4+IERXQ19QQVJBTVNfTUJMS19FTiAmDQo+IDB4MSkgPT0gMDsNCj4gwqAJCX0gZWxzZSB7 DQo+IMKgCQkJZHdjLT5ibG9ja19zaXplID0gcGRhdGEtPmJsb2NrX3NpemU7DQo+IC0NCj4gLQkJ CS8qIENoZWNrIGlmIGNoYW5uZWwgc3VwcG9ydHMgbXVsdGkgYmxvY2sNCj4gdHJhbnNmZXIgKi8N Cj4gLQkJCWNoYW5uZWxfd3JpdGVsKGR3YywgTExQLA0KPiBEV0NfTExQX0xPQygweGZmZmZmZmZm KSk7DQo+IC0JCQlkd2MtPm5vbGxwID0gRFdDX0xMUF9MT0MoY2hhbm5lbF9yZWFkbChkd2MsDQo+ IExMUCkpID09IDA7DQo+IC0JCQljaGFubmVsX3dyaXRlbChkd2MsIExMUCwgMCk7DQo+ICsJCQlk d2MtPm5vbGxwID0gcGRhdGEtPmlzX25vbGxwOw0KPiDCoAkJfQ0KPiDCoAl9DQo+IMKgDQo+IGRp ZmYgLS1naXQgYS9pbmNsdWRlL2xpbnV4L3BsYXRmb3JtX2RhdGEvZG1hLWR3LmgNCj4gYi9pbmNs dWRlL2xpbnV4L3BsYXRmb3JtX2RhdGEvZG1hLWR3LmgNCj4gaW5kZXggNDYzNmM5My4uNWYwZTEx ZSAxMDA2NDQNCj4gLS0tIGEvaW5jbHVkZS9saW51eC9wbGF0Zm9ybV9kYXRhL2RtYS1kdy5oDQo+ ICsrKyBiL2luY2x1ZGUvbGludXgvcGxhdGZvcm1fZGF0YS9kbWEtZHcuaA0KPiBAQCAtNDAsNiAr NDAsNyBAQCBzdHJ1Y3QgZHdfZG1hX3NsYXZlIHsNCj4gwqAgKiBAaXNfcHJpdmF0ZTogVGhlIGRl dmljZSBjaGFubmVscyBzaG91bGQgYmUgbWFya2VkIGFzIHByaXZhdGUgYW5kDQo+IG5vdCBmb3IN Cj4gwqAgKglieSB0aGUgZ2VuZXJhbCBwdXJwb3NlIERNQSBjaGFubmVsIGFsbG9jYXRvci4NCj4g wqAgKiBAaXNfbWVtY3B5OiBUaGUgZGV2aWNlIGNoYW5uZWxzIGRvIHN1cHBvcnQgbWVtb3J5LXRv LW1lbW9yeQ0KPiB0cmFuc2ZlcnMuDQo+ICsgKiBAaXNfbm9sbHA6IFRoZSBkZXZpY2UgY2hhbm5l bHMgZG9lcyBub3Qgc3VwcG9ydCBtdWx0aSBibG9jaw0KPiB0cmFuc2ZlcnMuDQo+IMKgICogQGNo YW5fYWxsb2NhdGlvbl9vcmRlcjogQWxsb2NhdGUgY2hhbm5lbHMgc3RhcnRpbmcgZnJvbSAwIG9y IDcNCj4gwqAgKiBAY2hhbl9wcmlvcml0eTogU2V0IGNoYW5uZWwgcHJpb3JpdHkgaW5jcmVhc2lu ZyBmcm9tIDAgdG8gNyBvciA3DQo+IHRvIDAuDQo+IMKgICogQGJsb2NrX3NpemU6IE1heGltdW0g YmxvY2sgc2l6ZSBzdXBwb3J0ZWQgYnkgdGhlIGNvbnRyb2xsZXINCj4gQEAgLTUxLDYgKzUyLDcg QEAgc3RydWN0IGR3X2RtYV9wbGF0Zm9ybV9kYXRhIHsNCj4gwqAJdW5zaWduZWQgaW50CW5yX2No YW5uZWxzOw0KPiDCoAlib29sCQlpc19wcml2YXRlOw0KPiDCoAlib29sCQlpc19tZW1jcHk7DQo+ ICsJYm9vbAkJaXNfbm9sbHA7DQo+IMKgI2RlZmluZSBDSEFOX0FMTE9DQVRJT05fQVNDRU5ESU5H CTAJLyogemVybyB0byBzZXZlbg0KPiAqLw0KPiDCoCNkZWZpbmUgQ0hBTl9BTExPQ0FUSU9OX0RF U0NFTkRJTkcJMQkvKiBzZXZlbiB0byB6ZXJvDQo+ICovDQo+IMKgCXVuc2lnbmVkIGNoYXIJY2hh bl9hbGxvY2F0aW9uX29yZGVyOw0KDQpMb29rcyBnb29kIHRvIG1lLg0KUmV2aWV3ZWQtYnk6IEV1 Z2VuaXkgUGxhdHNldiA8RXVnZW5peS5QYWx0c2V2QHN5bm9wc3lzLmNvbT4NCg==