From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:56018 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753650AbcHRJK4 (ORCPT ); Thu, 18 Aug 2016 05:10:56 -0400 Subject: Patch "spi: pxa2xx: Clear all RFT bits in reset_sccr1() on Intel Quark" has been added to the 4.4-stable tree To: andriy.shevchenko@linux.intel.com, broonie@kernel.org, gregkh@linuxfoundation.org Cc: , From: Date: Thu, 18 Aug 2016 11:10:43 +0200 Message-ID: <14715114432981@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled spi: pxa2xx: Clear all RFT bits in reset_sccr1() on Intel Quark to the 4.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: spi-pxa2xx-clear-all-rft-bits-in-reset_sccr1-on-intel-quark.patch and it can be found in the queue-4.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 152bc19e2fc2b7fce7ffbc2a9cea94b147223702 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 6 Jul 2016 12:08:11 +0300 Subject: spi: pxa2xx: Clear all RFT bits in reset_sccr1() on Intel Quark From: Andy Shevchenko commit 152bc19e2fc2b7fce7ffbc2a9cea94b147223702 upstream. It seems the commit e5262d0568dc ("spi: spi-pxa2xx: SPI support for Intel Quark X1000") misses one place to be adapted for Intel Quark, i.e. in reset_sccr1(). Clear all RFT bits when call reset_sccr1() on Intel Quark. Fixes: e5262d0568dc ("spi: spi-pxa2xx: SPI support for Intel Quark X1000") Signed-off-by: Andy Shevchenko Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman --- drivers/spi/spi-pxa2xx.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -548,7 +548,14 @@ static void reset_sccr1(struct driver_da u32 sccr1_reg; sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1; - sccr1_reg &= ~SSCR1_RFT; + switch (drv_data->ssp_type) { + case QUARK_X1000_SSP: + sccr1_reg &= ~QUARK_X1000_SSCR1_RFT; + break; + default: + sccr1_reg &= ~SSCR1_RFT; + break; + } sccr1_reg |= chip->threshold; pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); } Patches currently in stable-queue which might be from andriy.shevchenko@linux.intel.com are queue-4.4/gpio-intel-mid-remove-potentially-harmful-code.patch queue-4.4/spi-pxa2xx-clear-all-rft-bits-in-reset_sccr1-on-intel-quark.patch