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From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH] drm/i915: Flush delayed fence releases after reset
Date: Mon, 22 Aug 2016 12:16:33 +0300	[thread overview]
Message-ID: <1471857393.3601.2.camel@linux.intel.com> (raw)
In-Reply-To: <20160819131732.4227-1-chris@chris-wilson.co.uk>

On pe, 2016-08-19 at 14:17 +0100, Chris Wilson wrote:
> What I never hit in testing, but Mika immediately did, was a GPU hang
> with a pending fence release (where a tiled object has been changed by
> the user to be untiled, and the update has not yet been committed to the
> fence register). As the stride/tiling is 0, this causes a divide-by-zero
> error when trying to write the new fence parameters:
> 
>    28.784518] drm/i915: Resetting chip after gpu hang
> [   28.784551] divide error: 0000 [#1] PREEMPT SMP
> [   28.784565] Modules linked in: nls_iso8859_1 nls_cp437 vfat fat mxm_wmi x86_pkg_temp_thermal snd_hda_codec_hdmi kvm irqbypass snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_codec serio_raw snd_hwdep snd_hda_core snd_pcm snd_seq_midi snd_seq_midi_event snd_rawmidi snd_seq snd_timer snd_seq_device snd soundcore mac_hid wmi efivarfs autofs4 raid10 raid456 libcrc32c async_raid6_recov async_memcpy async_pq raid6_pq async_xor xor async_tx raid0 multipath linear psmouse e1000e ptp pps_core nvme nvme_core i915 i2c_algo_bit drm_kms_helper syscopyarea sysfillrect sysimgblt fb_sys_fops drm video
> [   28.784738] CPU: 0 PID: 1692 Comm: kworker/0:2 Not tainted 4.8.0-rc2+ #895
> [   28.784752] Hardware name: System manufacturer System Product Name/Z170M-PLUS, BIOS 1803 05/09/2016
> [   28.784786] Workqueue: events_long i915_hangcheck_elapsed [i915]
> [   28.784814] task: ffff923c18f59d40 task.stack: ffff923c1b7e4000
> [   28.784827] RIP: 0010:[]  [] fence_write+0x9f/0x3b0 [i915]
> [   28.784854] RSP: 0018:ffff923c1b7e7b30  EFLAGS: 00010246
> [   28.784866] RAX: 00000000008ca000 RBX: ffff923c18540000 RCX: 0000000000000020
> [   28.784880] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 000000000596d000
> [   28.784894] RBP: ffff923c1b7e7b68 R08: 0000000000000000 R09: 0000000000000000
> [   28.784908] R10: 0000000000000000 R11: 00000000008ca000 R12: ffff923c1ef9d600
> [   28.784921] R13: 0000000000100040 R14: 0000000000100044 R15: ffff923c18549908
> [   28.784935] FS:  0000000000000000(0000) GS:ffff923c36c00000(0000) knlGS:0000000000000000
> [   28.784951] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> [   28.784962] CR2: 00007f193373c893 CR3: 0000000419c78000 CR4: 00000000003406f0
> [   28.784976] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> [   28.784990] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
> [   28.785004] Stack:
> [   28.785009]  000000000596c03b ffff923c1b7e7b68 ffff923c18549938 0000000000000009
> [   28.785026]  ffff923c18540000 ffff923c18549280 ffff923c18547ce8 ffff923c1b7e7b90
> [   28.785044]  ffffffffc04761f9 ffff923c18540000 ffff923c18547d00 ffff923c18548ff8
> [   28.785062] Call Trace:
> [   28.785078]  [] i915_gem_restore_fences+0x39/0x50 [i915]
> [   28.785102]  [] i915_gem_reset+0x179/0x300 [i915]
> 
> Reported-by: Mika Kuoppala <mika.kuoppala@intel.com>
> Fixes: 49ef5294cda2 ("drm/i915: Move fence tracking from object to vma")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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      parent reply	other threads:[~2016-08-22  9:16 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-19 13:17 [PATCH] drm/i915: Flush delayed fence releases after reset Chris Wilson
2016-08-19 13:39 ` ✗ Ro.CI.BAT: failure for " Patchwork
2016-08-19 13:50 ` [PATCH] " Mika Kuoppala
2016-08-22  9:16 ` Joonas Lahtinen [this message]

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