From mboxrd@z Thu Jan 1 00:00:00 1970 From: CK Hu Subject: Re: [PATCH v7 2/9] drm/mediatek: add *driver_data for different hardware settings Date: Tue, 6 Sep 2016 15:26:10 +0800 Message-ID: <1473146770.11736.3.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-3-git-send-email-yt.shen@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1472815484-43821-3-git-send-email-yt.shen@mediatek.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: YT Shen Cc: Daniel Vetter , Jie Qiu , Mao Huang , yingjoe.chen@mediatek.com, Dan Carpenter , Jitao Shi , Sascha Hauer , linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, Matthias Brugger , shaoming chen , linux-arm-kernel@lists.infradead.org, srv_heupstream@mediatek.com, emil.l.velikov@gmail.com, linux-kernel@vger.kernel.org, Maxime Ripard List-Id: linux-mediatek@lists.infradead.org SGksIFlUOgoKT24gRnJpLCAyMDE2LTA5LTAyIGF0IDE5OjI0ICswODAwLCBZVCBTaGVuIHdyb3Rl Ogo+IFRoZXJlIGFyZSBzb21lIGhhcmR3YXJlIHNldHRpbmdzIGNoYW5nZWQsIGJldHdlZW4gTVQ4 MTczICYgTVQyNzAxOgo+IERJU1BfT1ZMIGFkZHJlc3Mgb2Zmc2V0IGNoYW5nZWQsIGNvbG9yIGZv cm1hdCBkZWZpbml0aW9uIGNoYW5nZWQuCj4gRElTUF9SRE1BIGZpZm8gc2l6ZSBjaGFuZ2VkLgo+ IERJU1BfQ09MT1Igb2Zmc2V0IGNoYW5nZWQuCj4gTUlQSV9UWCBwbGwgc2V0dGluZyBjaGFuZ2Vk Lgo+IEFuZCBhZGQgcHJlZml4IGZvciBtdGtfZGRwX21haW4gJiBtdGtfZGRwX2V4dCAmIG11dGV4 X21vZC4KPiAKPiBTaWduZWQtb2ZmLWJ5OiBZVCBTaGVuIDx5dC5zaGVuQG1lZGlhdGVrLmNvbT4K PiAtLS0KCltzbmlwLi4uXQoKPiAgCj4gQEAgLTE4NSw3ICsxODMsOCBAQCBzdGF0aWMgdm9pZCBt dGtfb3ZsX2xheWVyX2NvbmZpZyhzdHJ1Y3QgbXRrX2RkcF9jb21wICpjb21wLCB1bnNpZ25lZCBp bnQgaWR4LAo+ICAJd3JpdGVsX3JlbGF4ZWQocGl0Y2gsIGNvbXAtPnJlZ3MgKyBESVNQX1JFR19P VkxfUElUQ0goaWR4KSk7Cj4gIAl3cml0ZWxfcmVsYXhlZChzcmNfc2l6ZSwgY29tcC0+cmVncyAr IERJU1BfUkVHX09WTF9TUkNfU0laRShpZHgpKTsKPiAgCXdyaXRlbF9yZWxheGVkKG9mZnNldCwg Y29tcC0+cmVncyArIERJU1BfUkVHX09WTF9PRkZTRVQoaWR4KSk7Cj4gLQl3cml0ZWxfcmVsYXhl ZChhZGRyLCBjb21wLT5yZWdzICsgRElTUF9SRUdfT1ZMX0FERFIoaWR4KSk7CgpESVNQX1JFR19P VkxfQUREUigpIGlzIHVzZWxlc3MsIHNvIHJlbW92ZSBpdC4KCj4gKwl3cml0ZWxfcmVsYXhlZChh ZGRyLCBjb21wLT5yZWdzICsgY29tcC0+ZGF0YS0+b3ZsLmFkZHJfb2Zmc2V0Cj4gKwkJCQkJKyBp ZHggKiAweDIwKTsKPiAgCj4gIAlpZiAocGVuZGluZy0+ZW5hYmxlKQo+ICAJCW10a19vdmxfbGF5 ZXJfb24oY29tcCwgaWR4KTsKCgpSZWdhcmRzLApDSwoKX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxA bGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxt YW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: ck.hu@mediatek.com (CK Hu) Date: Tue, 6 Sep 2016 15:26:10 +0800 Subject: [PATCH v7 2/9] drm/mediatek: add *driver_data for different hardware settings In-Reply-To: <1472815484-43821-3-git-send-email-yt.shen@mediatek.com> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-3-git-send-email-yt.shen@mediatek.com> Message-ID: <1473146770.11736.3.camel@mtksdaap41> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, YT: On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > There are some hardware settings changed, between MT8173 & MT2701: > DISP_OVL address offset changed, color format definition changed. > DISP_RDMA fifo size changed. > DISP_COLOR offset changed. > MIPI_TX pll setting changed. > And add prefix for mtk_ddp_main & mtk_ddp_ext & mutex_mod. > > Signed-off-by: YT Shen > --- [snip...] > > @@ -185,7 +183,8 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, > writel_relaxed(pitch, comp->regs + DISP_REG_OVL_PITCH(idx)); > writel_relaxed(src_size, comp->regs + DISP_REG_OVL_SRC_SIZE(idx)); > writel_relaxed(offset, comp->regs + DISP_REG_OVL_OFFSET(idx)); > - writel_relaxed(addr, comp->regs + DISP_REG_OVL_ADDR(idx)); DISP_REG_OVL_ADDR() is useless, so remove it. > + writel_relaxed(addr, comp->regs + comp->data->ovl.addr_offset > + + idx * 0x20); > > if (pending->enable) > mtk_ovl_layer_on(comp, idx); Regards, CK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932941AbcIFH0R (ORCPT ); Tue, 6 Sep 2016 03:26:17 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:47471 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750721AbcIFH0P (ORCPT ); Tue, 6 Sep 2016 03:26:15 -0400 Message-ID: <1473146770.11736.3.camel@mtksdaap41> Subject: Re: [PATCH v7 2/9] drm/mediatek: add *driver_data for different hardware settings From: CK Hu To: YT Shen CC: , Philipp Zabel , David Airlie , Matthias Brugger , Daniel Kurtz , Mao Huang , Bibby Hsieh , "Daniel Vetter" , Thierry Reding , Jie Qiu , Maxime Ripard , Chris Wilson , shaoming chen , Jitao Shi , Boris Brezillon , Dan Carpenter , , , , , Sascha Hauer , , Date: Tue, 6 Sep 2016 15:26:10 +0800 In-Reply-To: <1472815484-43821-3-git-send-email-yt.shen@mediatek.com> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-3-git-send-email-yt.shen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, YT: On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > There are some hardware settings changed, between MT8173 & MT2701: > DISP_OVL address offset changed, color format definition changed. > DISP_RDMA fifo size changed. > DISP_COLOR offset changed. > MIPI_TX pll setting changed. > And add prefix for mtk_ddp_main & mtk_ddp_ext & mutex_mod. > > Signed-off-by: YT Shen > --- [snip...] > > @@ -185,7 +183,8 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, > writel_relaxed(pitch, comp->regs + DISP_REG_OVL_PITCH(idx)); > writel_relaxed(src_size, comp->regs + DISP_REG_OVL_SRC_SIZE(idx)); > writel_relaxed(offset, comp->regs + DISP_REG_OVL_OFFSET(idx)); > - writel_relaxed(addr, comp->regs + DISP_REG_OVL_ADDR(idx)); DISP_REG_OVL_ADDR() is useless, so remove it. > + writel_relaxed(addr, comp->regs + comp->data->ovl.addr_offset > + + idx * 0x20); > > if (pending->enable) > mtk_ovl_layer_on(comp, idx); Regards, CK