All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Pranith Kumar <bobby.prani@gmail.com>,
	Andrzej Zaborowski <balrogg@gmail.com>
Subject: [Qemu-devel] [PULL 07/18] tcg/arm: Add support for fence
Date: Wed,  7 Sep 2016 14:10:37 -0700	[thread overview]
Message-ID: <1473282648-23487-8-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1473282648-23487-1-git-send-email-rth@twiddle.net>

From: Pranith Kumar <bobby.prani@gmail.com>

Cc: Andrzej Zaborowski <balrogg@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20160714202026.9727-5-bobby.prani@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/arm/tcg-target.inc.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 58ffc0d..f3ff6f2 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -313,6 +313,10 @@ typedef enum {
     INSN_LDRD_REG  = 0x000000d0,
     INSN_STRD_IMM  = 0x004000f0,
     INSN_STRD_REG  = 0x000000f0,
+
+    INSN_DMB_ISH   = 0x5bf07ff5,
+    INSN_DMB_MCR   = 0xba0f07ee,
+
 } ARMInsn;
 
 #define SHIFT_IMM_LSL(im)	(((im) << 7) | 0x00)
@@ -1066,6 +1070,15 @@ static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l)
     }
 }
 
+static inline void tcg_out_mb(TCGContext *s, TCGArg a0)
+{
+    if (use_armv7_instructions) {
+        tcg_out32(s, INSN_DMB_ISH);
+    } else if (use_armv6_instructions) {
+        tcg_out32(s, INSN_DMB_MCR);
+    }
+}
+
 #ifdef CONFIG_SOFTMMU
 /* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
  *                                     int mmu_idx, uintptr_t ra)
@@ -1928,6 +1941,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
         tcg_out_udiv(s, COND_AL, args[0], args[1], args[2]);
         break;
 
+    case INDEX_op_mb:
+        tcg_out_mb(s, args[0]);
+        break;
+
     case INDEX_op_mov_i32:  /* Always emitted via tcg_out_mov.  */
     case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi.  */
     case INDEX_op_call:     /* Always emitted via tcg_out_call.  */
@@ -2002,6 +2019,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
     { INDEX_op_div_i32, { "r", "r", "r" } },
     { INDEX_op_divu_i32, { "r", "r", "r" } },
 
+    { INDEX_op_mb, { } },
     { -1 },
 };
 
-- 
2.7.4

  parent reply	other threads:[~2016-09-07 21:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-07 21:10 [Qemu-devel] [PULL 00/18] tcg queued patches Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 01/18] tcg: Support arbitrary size + alignment Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 02/18] tcg: Merge GETPC and GETRA Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 03/18] cpu-exec: Check -dfilter for -d cpu Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 04/18] Introduce TCGOpcode for memory barrier Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 05/18] tcg/i386: Add support for fence Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 06/18] tcg/aarch64: " Richard Henderson
2016-09-07 21:10 ` Richard Henderson [this message]
2016-09-07 21:10 ` [Qemu-devel] [PULL 08/18] tcg/ia64: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 09/18] tcg/mips: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 10/18] tcg/ppc: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 11/18] tcg/s390: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 12/18] tcg/sparc: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 13/18] tcg/tci: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 14/18] target-arm: Generate fences in ARMv7 frontend Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 15/18] target-alpha: Generate fence op Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 16/18] target-aarch64: Generate fences for aarch64 Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 17/18] target-i386: Generate fences for x86 Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 18/18] tcg: Optimize fence instructions Richard Henderson
2016-09-08 17:15 ` [Qemu-devel] [PULL v2 00/18] tcg queued patches Richard Henderson
2016-09-08 20:38   ` Richard Henderson
2016-09-08 23:49     ` Pranith Kumar
2016-09-09  0:06       ` Pranith Kumar
2016-09-09  6:51         ` Richard Henderson
2016-09-12 17:23           ` Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1473282648-23487-8-git-send-email-rth@twiddle.net \
    --to=rth@twiddle.net \
    --cc=balrogg@gmail.com \
    --cc=bobby.prani@gmail.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.