From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44594) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bi7sG-00037p-L9 for qemu-devel@nongnu.org; Thu, 08 Sep 2016 18:32:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bi7sF-0000hS-EW for qemu-devel@nongnu.org; Thu, 08 Sep 2016 18:32:48 -0400 Received: from mail-wm0-x241.google.com ([2a00:1450:400c:c09::241]:32921) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bi7sF-0000hO-51 for qemu-devel@nongnu.org; Thu, 08 Sep 2016 18:32:47 -0400 Received: by mail-wm0-x241.google.com with SMTP id b187so209125wme.0 for ; Thu, 08 Sep 2016 15:32:47 -0700 (PDT) From: Michael Rolnik Date: Fri, 9 Sep 2016 01:31:49 +0300 Message-Id: <1473373930-31547-9-git-send-email-mrolnik@gmail.com> In-Reply-To: <1473373930-31547-1-git-send-email-mrolnik@gmail.com> References: <1473373930-31547-1-git-send-email-mrolnik@gmail.com> Subject: [Qemu-devel] [PATCH RFC v1 08/29] target-arc: MOV, EXT, SEX, SWAP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Rolnik Signed-off-by: Michael Rolnik --- target-arc/translate-inst.c | 156 ++++++++++++++++++++++++++++++++++++++++++++ target-arc/translate-inst.h | 7 ++ 2 files changed, 163 insertions(+) diff --git a/target-arc/translate-inst.c b/target-arc/translate-inst.c index 5404f35..4d756a9 100644 --- a/target-arc/translate-inst.c +++ b/target-arc/translate-inst.c @@ -923,3 +923,159 @@ int arc_gen_MIN(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) return BS_NONE; } +/* + MOV +*/ +int arc_gen_MOV(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv rslt = dest; + + if (TCGV_EQUAL(dest, src1)) { + rslt = tcg_temp_new_i32(); + } + + tcg_gen_mov_tl(rslt, src1); + + if (ctx->opt.f) { + tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero); + tcg_gen_shri_tl(cpu_Nf, rslt, 31); + } + + if (!TCGV_EQUAL(dest, rslt)) { + tcg_gen_mov_tl(dest, rslt); + tcg_temp_free_i32(rslt); + } + + return BS_NONE; +} + +/* + EXTB +*/ +int arc_gen_EXTB(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv rslt = dest; + + if (TCGV_EQUAL(dest, src1)) { + rslt = tcg_temp_new_i32(); + } + + tcg_gen_ext8u_tl(rslt, src1); + + if (ctx->opt.f) { + tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero); + tcg_gen_movi_tl(cpu_Nf, 0); + } + + if (!TCGV_EQUAL(dest, rslt)) { + tcg_gen_mov_tl(dest, rslt); + tcg_temp_free_i32(rslt); + } + + return BS_NONE; +} + +/* + EXTW +*/ +int arc_gen_EXTW(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv rslt = dest; + + if (TCGV_EQUAL(dest, src1)) { + rslt = tcg_temp_new_i32(); + } + + tcg_gen_ext16u_tl(rslt, src1); + + if (ctx->opt.f) { + tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero); + tcg_gen_movi_tl(cpu_Nf, 0); + } + + if (!TCGV_EQUAL(dest, rslt)) { + tcg_gen_mov_tl(dest, rslt); + tcg_temp_free_i32(rslt); + } + + return BS_NONE; +} + +/* + SEXB +*/ +int arc_gen_SEXB(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv rslt = dest; + + if (TCGV_EQUAL(dest, src1)) { + rslt = tcg_temp_new_i32(); + } + + tcg_gen_ext8s_tl(rslt, src1); + + if (ctx->opt.f) { + tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero); + tcg_gen_shri_tl(cpu_Nf, rslt, 31); + } + + if (!TCGV_EQUAL(dest, rslt)) { + tcg_gen_mov_tl(dest, rslt); + tcg_temp_free_i32(rslt); + } + + return BS_NONE; +} + +/* + SEXW +*/ +int arc_gen_SEXW(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv rslt = dest; + + if (TCGV_EQUAL(dest, src1)) { + rslt = tcg_temp_new_i32(); + } + + tcg_gen_ext16s_tl(rslt, src1); + + if (ctx->opt.f) { + tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero); + tcg_gen_shri_tl(cpu_Nf, rslt, 31); + } + + if (!TCGV_EQUAL(dest, rslt)) { + tcg_gen_mov_tl(dest, rslt); + tcg_temp_free_i32(rslt); + } + + return BS_NONE; +} + +/* + SWAP +*/ +int arc_gen_SWAP(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv rslt = dest; + + if (TCGV_EQUAL(dest, src1)) { + rslt = tcg_temp_new_i32(); + } + + tcg_gen_rotli_tl(rslt, src1, 16); + + if (ctx->opt.f) { + tcg_gen_setcond_tl(TCG_COND_EQ, cpu_Zf, rslt, ctx->zero); + tcg_gen_shri_tl(cpu_Nf, rslt, 31); + } + + if (!TCGV_EQUAL(dest, rslt)) { + tcg_gen_mov_tl(dest, rslt); + tcg_temp_free_i32(rslt); + } + + return BS_NONE; +} + diff --git a/target-arc/translate-inst.h b/target-arc/translate-inst.h index 0dc7f4c..916d94e 100644 --- a/target-arc/translate-inst.h +++ b/target-arc/translate-inst.h @@ -64,3 +64,10 @@ int arc_gen_SYNC(DisasCtxt *c); int arc_gen_MAX(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2); int arc_gen_MIN(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_MOV(DisasCtxt *c, TCGv dest, TCGv src1); +int arc_gen_EXTB(DisasCtxt *c, TCGv dest, TCGv src1); +int arc_gen_EXTW(DisasCtxt *c, TCGv dest, TCGv src1); +int arc_gen_SEXB(DisasCtxt *c, TCGv dest, TCGv src1); +int arc_gen_SEXW(DisasCtxt *c, TCGv dest, TCGv src1); +int arc_gen_SWAP(DisasCtxt *c, TCGv dest, TCGv src1); + -- 2.4.9 (Apple Git-60)