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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/6] arm64: KVM: Move GIC accessors to arch_gicv3.h
Date: Fri,  9 Sep 2016 12:16:03 +0100	[thread overview]
Message-ID: <1473419765-3437-5-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1473419765-3437-1-git-send-email-will.deacon@arm.com>

From: Vladimir Murzin <vladimir.murzin@arm.com>

Since we are going to share vgic-v3 save/restore code with ARM
keep arch specific accessors separately.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/arch_gicv3.h | 13 +++++++++++++
 arch/arm64/kvm/hyp/vgic-v3-sr.c     | 13 -------------
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 8ec88e5b290f..ae7dbd79e257 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -79,6 +79,19 @@
 #include <linux/stringify.h>
 #include <asm/barrier.h>
 
+#define read_gicreg(r)							\
+	({								\
+		u64 reg;						\
+		asm volatile("mrs_s %0, " __stringify(r) : "=r" (reg));	\
+		reg;							\
+	})
+
+#define write_gicreg(v,r)						\
+	do {								\
+		u64 __val = (v);					\
+		asm volatile("msr_s " __stringify(r) ", %0" : : "r" (__val));\
+	} while (0)
+
 /*
  * Low-level accessors
  *
diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c
index 5f8f80b4a224..f2dbd2e76dbd 100644
--- a/arch/arm64/kvm/hyp/vgic-v3-sr.c
+++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c
@@ -24,19 +24,6 @@
 #define vtr_to_max_lr_idx(v)		((v) & 0xf)
 #define vtr_to_nr_pri_bits(v)		(((u32)(v) >> 29) + 1)
 
-#define read_gicreg(r)							\
-	({								\
-		u64 reg;						\
-		asm volatile("mrs_s %0, " __stringify(r) : "=r" (reg));	\
-		reg;							\
-	})
-
-#define write_gicreg(v,r)						\
-	do {								\
-		u64 __val = (v);					\
-		asm volatile("msr_s " __stringify(r) ", %0" : : "r" (__val));\
-	} while (0)
-
 static u64 __hyp_text __gic_v3_get_lr(unsigned int lr)
 {
 	switch (lr & 0xf) {
-- 
2.1.4

  parent reply	other threads:[~2016-09-09 11:16 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-09 11:15 [PATCH 0/6] Further NOP/sysreg cleanups Will Deacon
2016-09-09 11:16 ` [PATCH 1/6] arm64: sysreg: replace open-coded mrs_s/msr_s with {read, write}_sysreg_s Will Deacon
2016-09-09 12:40   ` [PATCH 1/6] arm64: sysreg: replace open-coded mrs_s/msr_s with {read,write}_sysreg_s Mark Rutland
2016-09-09 11:16 ` [PATCH 2/6] arm64: barriers: introduce nops and __nops macros for NOP sequences Will Deacon
2016-09-09 11:16 ` [PATCH 3/6] arm64: lse: convert lse alternatives NOP padding to use __nops Will Deacon
2016-09-09 11:16 ` Will Deacon [this message]
2016-09-09 11:16 ` [PATCH 5/6] irqchip/gic-v3: Convert arm64 GIC accessors to {read, write}_sysreg_s Will Deacon
2016-09-09 11:16 ` [PATCH 6/6] irqchip/gic-v3: Use nops macro for Cavium ThunderX erratum 23154 Will Deacon

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