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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Mon, 12 Sep 2016 16:08:50 +1000
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Subject: Re: [Qemu-devel] [PATCH v3 3/3] target-ppc: tlbie should have
 global effect
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To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Cc: alex.bennee@linaro.org, qemu-devel@nongnu.org, rth@twiddle.net

On Mon, 2016-09-12 at 11:18 +0530, Nikunj A Dadhania wrote:
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index 5026804..d96ff66 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -4448,6 +4448,7 @@ static void gen_tlbie(DisasContext *ctx)
> =C2=A0#if defined(CONFIG_USER_ONLY)
> =C2=A0=C2=A0=C2=A0=C2=A0 GEN_PRIV;
> =C2=A0#else
> +=C2=A0=C2=A0=C2=A0 TCGv_i32 t1;
> =C2=A0=C2=A0=C2=A0=C2=A0 CHK_HV;
> =C2=A0
> =C2=A0=C2=A0=C2=A0=C2=A0 if (NARROW_MODE(ctx)) {
> @@ -4458,6 +4459,11 @@ static void gen_tlbie(DisasContext *ctx)
> =C2=A0=C2=A0=C2=A0=C2=A0 } else {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 gen_helper_tlbie(cpu_e=
nv, cpu_gpr[rB(ctx->opcode)]);
> =C2=A0=C2=A0=C2=A0=C2=A0 }
> +=C2=A0=C2=A0=C2=A0 t1 =3D tcg_temp_new_i32();
> +=C2=A0=C2=A0=C2=A0 tcg_gen_ld_i32(t1, cpu_env, offsetof(CPUPPCState, t=
lb_need_flush));
> +=C2=A0=C2=A0=C2=A0 tcg_gen_ori_i32(t1, t1, TLB_NEED_GLOBAL_FLUSH);
> +=C2=A0=C2=A0=C2=A0 tcg_gen_st_i32(t1, cpu_env, offsetof(CPUPPCState, t=
lb_need_flush));
> +=C2=A0=C2=A0=C2=A0 tcg_temp_free_i32(t1);
> =C2=A0#endif /* defined(CONFIG_USER_ONLY) */

Why not do this in the helper ?=C2=A0

Cheers,
Ben.