diff for duplicates of <1473936433.10230.46.camel@nexus-software.ie> diff --git a/a/1.txt b/N1/1.txt index b75e486..425c5bc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -7,18 +7,18 @@ PMIC -> refclk provided to each (timer) element below. MSM8994(timer) -- > USB WD8a -? ? ? ? ? ? ? ?APBridgeA (timer) -> UniPro bus -? ? ? ? ? ? ? ?WD8a -????????????????????????????????????????????-> Module(timer) with UART -? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD1 -????????????????????????????????????????????-> Module(timer) with GPIO -? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD2 -????????????????????????????????????????????-> Module(timer) with blah -? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD3 -??????????????????????????????-> SPI bus -????????????????????????????????????????????-> SVC(timer) -???????????????????????????????????????????????Owns FrameTime -? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?GPIO {WD0...WDn} + APBridgeA (timer) -> UniPro bus + WD8a + -> Module(timer) with UART + WD1 + -> Module(timer) with GPIO + WD2 + -> Module(timer) with blah + WD3 + -> SPI bus + -> SVC(timer) + Owns FrameTime + GPIO {WD0...WDn} So yes, each processor has it's own timer. We aren't trying to read the MSM's FrameTime. diff --git a/a/content_digest b/N1/content_digest index 80cda36..2d16614 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -5,10 +5,27 @@ "ref\01473932133.10230.25.camel@nexus-software.ie\0" "ref\020160915101330.GB6718@leverpostej\0" "ref\01473935756.10230.42.camel@nexus-software.ie\0" - "From\0pure.logic@nexus-software.ie (Bryan O'Donoghue)\0" - "Subject\0[GIT PULL] Greybus driver subsystem for 4.9-rc1\0" + "From\0Bryan O'Donoghue <pure.logic@nexus-software.ie>\0" + "Subject\0Re: [GIT PULL] Greybus driver subsystem for 4.9-rc1\0" "Date\0Thu, 15 Sep 2016 11:47:13 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Mark Rutland <mark.rutland@arm.com>\0" + "Cc\0Greg KH <gregkh@linuxfoundation.org>" + Arnd Bergmann <arnd@arndb.de> + linux-kernel@vger.kernel.org + Johan Hovold <johan@hovoldconsulting.com> + Rui Miguel Silva <rmfrfs@gmail.com> + Laurent Pinchart <laurent.pinchart@ideasonboard.com> + Sandeep Patil <sspatil@google.com> + Matt Porter <mporter@kernel.crashing.org> + John Stultz <john.stultz@linaro.org> + Rob Herring <robh@kernel.org> + Viresh Kumar <viresh.kumar@linaro.org> + Alex Elder <elder@linaro.org> + David Lin <dtwlin@google.com> + Vaibhav Agarwal <vaibhav.agarwal@linaro.org> + Mark Greer <mgreer@animalcreek.com> + marc.zyngier@arm.com + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Thu, 2016-09-15 at 11:35 +0100, Bryan O'Donoghue wrote:\n" @@ -20,18 +37,18 @@ "\n" "MSM8994(timer) -- > USB\n" "WD8a\n" - "? ? ? ? ? ? ? ?APBridgeA (timer) -> UniPro bus\n" - "? ? ? ? ? ? ? ?WD8a\n" - "????????????????????????????????????????????-> Module(timer) with UART\n" - "? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD1\n" - "????????????????????????????????????????????-> Module(timer) with GPIO\n" - "? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD2\n" - "????????????????????????????????????????????-> Module(timer) with blah\n" - "? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD3\n" - "??????????????????????????????-> SPI bus\n" - "????????????????????????????????????????????-> SVC(timer)\n" - "???????????????????????????????????????????????Owns FrameTime\n" - "? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?GPIO {WD0...WDn}\n" + "\302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240APBridgeA (timer) -> UniPro bus\n" + "\302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240WD8a\n" + "\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240-> Module(timer) with UART\n" + "\302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240WD1\n" + "\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240-> Module(timer) with GPIO\n" + "\302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240WD2\n" + "\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240-> Module(timer) with blah\n" + "\302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240WD3\n" + "\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240-> SPI bus\n" + "\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240-> SVC(timer)\n" + "\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240Owns FrameTime\n" + "\302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240GPIO {WD0...WDn}\n" "\n" "So yes, each processor has it's own timer. We aren't trying to read the\n" "MSM's FrameTime.\n" @@ -39,4 +56,4 @@ "---\n" bod -7879f96f743cd2bef0c8ac6209af37f4ab069eb5b888ce929960892fc055bca4 +37a89f9bda570315f351c7fcc7fc5f65fd278b26624fdc48965fbe600b6cd431
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