From mboxrd@z Thu Jan  1 00:00:00 1970
From: pure.logic@nexus-software.ie (Bryan O'Donoghue)
Date: Thu, 15 Sep 2016 11:47:13 +0100
Subject: [GIT PULL] Greybus driver subsystem for 4.9-rc1
In-Reply-To: <1473935756.10230.42.camel@nexus-software.ie>
References: <20160914100949.GA6179@kroah.com>
 <20160914173625.GB15356@leverpostej> <20160914180754.GA16053@kroah.com>
 <20160914182952.GA21615@kroah.com>
 <1473932133.10230.25.camel@nexus-software.ie>
 <20160915101330.GB6718@leverpostej>
 <1473935756.10230.42.camel@nexus-software.ie>
Message-ID: <1473936433.10230.46.camel@nexus-software.ie>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On Thu, 2016-09-15 at 11:35 +0100, Bryan O'Donoghue wrote:
> 

Here's a slightly better diagram.

PMIC -> refclk provided to each (timer) element below.

MSM8994(timer) -- > USB
WD8a
? ? ? ? ? ? ? ?APBridgeA (timer) -> UniPro bus
? ? ? ? ? ? ? ?WD8a
????????????????????????????????????????????-> Module(timer) with UART
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD1
????????????????????????????????????????????-> Module(timer) with GPIO
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD2
????????????????????????????????????????????-> Module(timer) with blah
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?WD3
??????????????????????????????-> SPI bus
????????????????????????????????????????????-> SVC(timer)
???????????????????????????????????????????????Owns FrameTime
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?GPIO {WD0...WDn}

So yes, each processor has it's own timer. We aren't trying to read the
MSM's FrameTime.

---
bod

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Message-ID: <1473936433.10230.46.camel@nexus-software.ie>
Subject: Re: [GIT PULL] Greybus driver subsystem for 4.9-rc1
From: "Bryan O'Donoghue" <pure.logic@nexus-software.ie>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Greg KH <gregkh@linuxfoundation.org>, Arnd Bergmann <arnd@arndb.de>,
        linux-kernel@vger.kernel.org,
        Johan Hovold <johan@hovoldconsulting.com>,
        Rui Miguel Silva <rmfrfs@gmail.com>,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Sandeep Patil <sspatil@google.com>,
        Matt Porter <mporter@kernel.crashing.org>,
        John Stultz <john.stultz@linaro.org>, Rob Herring <robh@kernel.org>,
        Viresh Kumar <viresh.kumar@linaro.org>, Alex Elder <elder@linaro.org>,
        David Lin <dtwlin@google.com>,
        Vaibhav Agarwal <vaibhav.agarwal@linaro.org>,
        Mark Greer <mgreer@animalcreek.com>, marc.zyngier@arm.com,
        linux-arm-kernel@lists.infradead.org
Date: Thu, 15 Sep 2016 11:47:13 +0100
In-Reply-To: <1473935756.10230.42.camel@nexus-software.ie>
References: <20160914100949.GA6179@kroah.com>
         <20160914173625.GB15356@leverpostej> <20160914180754.GA16053@kroah.com>
         <20160914182952.GA21615@kroah.com>
         <1473932133.10230.25.camel@nexus-software.ie>
         <20160915101330.GB6718@leverpostej>
         <1473935756.10230.42.camel@nexus-software.ie>
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On Thu, 2016-09-15 at 11:35 +0100, Bryan O'Donoghue wrote:
> 

Here's a slightly better diagram.

PMIC -> refclk provided to each (timer) element below.

MSM8994(timer) -- > USB
WD8a
               APBridgeA (timer) -> UniPro bus
               WD8a
                                            -> Module(timer) with UART
                                               WD1
                                            -> Module(timer) with GPIO
                                               WD2
                                            -> Module(timer) with blah
                                               WD3
                              -> SPI bus
                                            -> SVC(timer)
                                               Owns FrameTime
                                               GPIO {WD0...WDn}

So yes, each processor has it's own timer. We aren't trying to read the
MSM's FrameTime.

---
bod