From mboxrd@z Thu Jan 1 00:00:00 1970 From: joe@perches.com (Joe Perches) Date: Tue, 20 Sep 2016 23:12:59 -0700 Subject: iomux-mx3.h: possible macro precedence issue In-Reply-To: <20160921060609.5efuaa2sdsti2j5g@pengutronix.de> References: <1474401744.1954.55.camel@perches.com> <20160921060609.5efuaa2sdsti2j5g@pengutronix.de> Message-ID: <1474438379.15981.1.camel@perches.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, 2016-09-21 at 08:06 +0200, Uwe Kleine-K?nig wrote:\ > On Tue, Sep 20, 2016 at 01:02:24PM -0700, Joe Perches wrote: > > Julia Lawall wrote a script > > > > Link:?http://lkml.kernel.org/r/alpine.DEB.2.10.1609201503260.2914 at hadrien > > > > that found a possible issue with macro argument precedence. > > > > > > diff -u -p a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h > > --- a/arch/arm/mach-imx/iomux-mx3.h > > +++ b/arch/arm/mach-imx/iomux-mx3.h > > @@ -529,7 +529,7 @@ enum iomux_pins { > > ?#define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1) > > ?#define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1) > > ?#define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1) > > -#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE) > > +#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)) > > ?#define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2) > > ?#define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2) > > ?#define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2) > > > I assume this is the only problematic definition? yes.. > If so, there is a > single affected platform: arch/arm/mach-imx/mach-kzm_arm11_01.c > ? > > this may be intentional, but perhaps a solution > > would be to use parentheses in the #define IOMUX_MODE? > > > > --- > > > > diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h > > index 368667b..3f9ede2 100644 > > --- a/arch/arm/mach-imx/iomux-mx3.h > > +++ b/arch/arm/mach-imx/iomux-mx3.h > > @@ -156,7 +156,7 @@ void mxc_iomux_mode(unsigned int pin_mode); > > > > ? (((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \ > > > > ? (padnum & IOMUX_PADNUM_MASK)) > > ? > > -#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT) > > +#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT)) > > ? > > ?#define IOMUX_TO_GPIO(iomux_pin) \ > > ? ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) > > > My preference is to fix IOMUX_MODE instead of adding the parents to > MX31_PIN_DTR_DTE1__DTR_DTE2. Mine too. > Joe, do you create a proper patch? I just don't have the hardware and don't know what was intended by the existing code. It does appear to be a defect though. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932424AbcIUGNF (ORCPT ); Wed, 21 Sep 2016 02:13:05 -0400 Received: from smtprelay0048.hostedemail.com ([216.40.44.48]:36324 "EHLO smtprelay.hostedemail.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754016AbcIUGNE (ORCPT ); Wed, 21 Sep 2016 02:13:04 -0400 X-Session-Marker: 6A6F6540706572636865732E636F6D X-Spam-Summary: 50,0,0,,d41d8cd98f00b204,joe@perches.com,:::::::::::,RULES_HIT:41:355:379:541:599:960:967:973:982:988:989:1260:1263:1277:1311:1313:1314:1345:1359:1373:1437:1515:1516:1518:1534:1542:1593:1594:1711:1730:1747:1777:1792:2393:2525:2553:2560:2563:2682:2685:2828:2859:2902:2933:2937:2939:2942:2945:2947:2951:2954:3022:3138:3139:3140:3141:3142:3354:3622:3865:3866:3867:3868:3870:3871:3872:3873:3874:3934:3936:3938:3941:3944:3947:3950:3953:3956:3959:4321:4470:5007:8599:9025:10004:10400:10848:11026:11232:11473:11657:11658:11914:12043:12296:12438:12555:12740:12783:13439:13894:14181:14659:14721:14849:21063:21080:21451:30012:30054:30090:30091,0,RBL:none,CacheIP:none,Bayesian:0.5,0.5,0.5,Netcheck:none,DomainCache:0,MSF:not bulk,SPF:fn,MSBL:0,DNSBL:none,Custom_rules:0:0:0,LFtime:1,LUA_SUMMARY:none X-HE-Tag: angle69_37802d8278c62 X-Filterd-Recvd-Size: 3487 Message-ID: <1474438379.15981.1.camel@perches.com> Subject: Re: iomux-mx3.h: possible macro precedence issue From: Joe Perches To: Uwe =?ISO-8859-1?Q?Kleine-K=F6nig?= Cc: Sascha Hauer , Julia Lawall , LKML , linux-arm-kernel , Shawn Guo Date: Tue, 20 Sep 2016 23:12:59 -0700 In-Reply-To: <20160921060609.5efuaa2sdsti2j5g@pengutronix.de> References: <1474401744.1954.55.camel@perches.com> <20160921060609.5efuaa2sdsti2j5g@pengutronix.de> Content-Type: text/plain; charset="ISO-8859-1" X-Mailer: Evolution 3.21.91-1ubuntu1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2016-09-21 at 08:06 +0200, Uwe Kleine-König wrote:\ > On Tue, Sep 20, 2016 at 01:02:24PM -0700, Joe Perches wrote: > > Julia Lawall wrote a script > > > > Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1609201503260.2914@hadrien > > > > that found a possible issue with macro argument precedence. > > > > > > diff -u -p a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h > > --- a/arch/arm/mach-imx/iomux-mx3.h > > +++ b/arch/arm/mach-imx/iomux-mx3.h > > @@ -529,7 +529,7 @@ enum iomux_pins { > >  #define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1) > >  #define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1) > >  #define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1) > > -#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE) > > +#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)) > >  #define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2) > >  #define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2) > >  #define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2) > > > I assume this is the only problematic definition? yes.. > If so, there is a > single affected platform: arch/arm/mach-imx/mach-kzm_arm11_01.c >   > > this may be intentional, but perhaps a solution > > would be to use parentheses in the #define IOMUX_MODE  > > > > --- > > > > diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h > > index 368667b..3f9ede2 100644 > > --- a/arch/arm/mach-imx/iomux-mx3.h > > +++ b/arch/arm/mach-imx/iomux-mx3.h > > @@ -156,7 +156,7 @@ void mxc_iomux_mode(unsigned int pin_mode); > > > >   (((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \ > > > >   (padnum & IOMUX_PADNUM_MASK)) > >   > > -#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT) > > +#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT)) > >   > >  #define IOMUX_TO_GPIO(iomux_pin) \ > >   ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) > > > My preference is to fix IOMUX_MODE instead of adding the parents to > MX31_PIN_DTR_DTE1__DTR_DTE2. Mine too. > Joe, do you create a proper patch? I just don't have the hardware and don't know what was intended by the existing code. It does appear to be a defect though.