From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:45839 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933626AbcIVNhZ (ORCPT ); Thu, 22 Sep 2016 09:37:25 -0400 Subject: Patch "perf/x86/intel: Fix PEBSv3 record drain" has been added to the 4.7-stable tree To: peterz@infradead.org, acme@redhat.com, alexander.shishkin@linux.intel.com, eranian@google.com, gregkh@linuxfoundation.org, jolsa@redhat.com, kan.liang@intel.com, mingo@kernel.org, tglx@linutronix.de, torvalds@linux-foundation.org, vince@deater.net Cc: , From: Date: Thu, 22 Sep 2016 15:35:44 +0200 Message-ID: <147455134424569@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled perf/x86/intel: Fix PEBSv3 record drain to the 4.7-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: perf-x86-intel-fix-pebsv3-record-drain.patch and it can be found in the queue-4.7 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 8ef9b8455a2a3049efa9e46e8a6402b972a3eb41 Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Wed, 7 Sep 2016 14:42:55 +0200 Subject: perf/x86/intel: Fix PEBSv3 record drain From: Peter Zijlstra commit 8ef9b8455a2a3049efa9e46e8a6402b972a3eb41 upstream. Alexander hit the WARN_ON_ONCE(!event) on his Skylake while running the perf fuzzer. This means the PEBSv3 record included a status bit for an inactive event, something that _should_ not happen. Move the code that filters the status bits against our known PEBS events up a spot to guarantee we only deal with events we know about. Further add "continue" statements to the WARN_ON_ONCE()s such that we'll not die nor generate silly events in case we ever do hit them again. Reported-by: Alexander Shishkin Tested-by: Alexander Shishkin Signed-off-by: Peter Zijlstra (Intel) Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Kan Liang Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Fixes: a3d86542de88 ("perf/x86/intel/pebs: Add PEBSv3 decoding") Signed-off-by: Ingo Molnar Signed-off-by: Greg Kroah-Hartman --- arch/x86/events/intel/ds.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1274,18 +1274,18 @@ static void intel_pmu_drain_pebs_nhm(str struct pebs_record_nhm *p = at; u64 pebs_status; - /* PEBS v3 has accurate status bits */ + pebs_status = p->status & cpuc->pebs_enabled; + pebs_status &= (1ULL << x86_pmu.max_pebs_events) - 1; + + /* PEBS v3 has more accurate status bits */ if (x86_pmu.intel_cap.pebs_format >= 3) { - for_each_set_bit(bit, (unsigned long *)&p->status, - MAX_PEBS_EVENTS) + for_each_set_bit(bit, (unsigned long *)&pebs_status, + x86_pmu.max_pebs_events) counts[bit]++; continue; } - pebs_status = p->status & cpuc->pebs_enabled; - pebs_status &= (1ULL << x86_pmu.max_pebs_events) - 1; - /* * On some CPUs the PEBS status can be zero when PEBS is * racing with clearing of GLOBAL_STATUS. @@ -1333,8 +1333,11 @@ static void intel_pmu_drain_pebs_nhm(str continue; event = cpuc->events[bit]; - WARN_ON_ONCE(!event); - WARN_ON_ONCE(!event->attr.precise_ip); + if (WARN_ON_ONCE(!event)) + continue; + + if (WARN_ON_ONCE(!event->attr.precise_ip)) + continue; /* log dropped samples number */ if (error[bit]) Patches currently in stable-queue which might be from peterz@infradead.org are queue-4.7/perf-x86-intel-pt-fix-an-off-by-one-in-address-filter-configuration.patch queue-4.7/perf-x86-intel-fix-pebsv3-record-drain.patch queue-4.7/arm64-spinlocks-implement-smp_mb__before_spinlock-as-smp_mb.patch queue-4.7/perf-x86-intel-pt-do-validate-the-size-of-a-kernel-address-filter.patch queue-4.7/sched-core-fix-a-race-between-try_to_wake_up-and-a-woken-up-task.patch queue-4.7/perf-x86-intel-pt-fix-kernel-address-filter-s-offset-validation.patch queue-4.7/perf-x86-amd-make-hw_cache_references-and-hw_cache_misses-measure-l2.patch