From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55521) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bopTV-0000Fb-I3 for qemu-devel@nongnu.org; Tue, 27 Sep 2016 06:18:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bopTQ-0006GU-JU for qemu-devel@nongnu.org; Tue, 27 Sep 2016 06:18:57 -0400 Message-ID: <1474971518.2857.280.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Tue, 27 Sep 2016 20:18:38 +1000 In-Reply-To: <403f0f67-abee-6fcd-bf69-1339623fe228@kaod.org> References: <1473943560-14846-1-git-send-email-clg@kaod.org> <1473943560-14846-8-git-send-email-clg@kaod.org> <20160921060845.GC20488@umbus> <403f0f67-abee-6fcd-bf69-1339623fe228@kaod.org> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 07/10] ppc/pnv: add XSCOM infrastructure List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-1?Q?C=E9dric?= Le Goater , David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On Tue, 2016-09-27 at 11:30 +0200, C=C3=A9dric Le Goater wrote: > On 09/27/2016 11:10 AM, C=C3=A9dric Le Goater wrote: > >=20 > > >=20 > > > >=20 > > > > +#include > > > > + > > > > +static void xscom_complete(uint64_t hmer_bits) > > > > +{ > > > > +=C2=A0=C2=A0=C2=A0=C2=A0CPUState *cs =3D current_cpu; > > >=20 > > > Hmm.. is current_cpu a safe thing to use in the case of KVM or MTTC= G? > >=20 > > yes, as we are running under cpu_exec when doing this call. >=20 > well, this is not true under the monitor.=C2=A0 >=20 > So we will have to come up with something to handle xscom read/writes=C2= =A0 > from the monitor. Could we use first_cpu in that case ?=C2=A0 Well, we'll need to find the chip etc... I think the XSCOM bridge (or bus= ) should have special methods for the monitor that don't update HMER but print out the status instead. Cheers, Ben. > Thanks, >=20 > C.=C2=A0 >=20 > >=20 > > >=20 > > > >=20 > > > > +=C2=A0=C2=A0=C2=A0=C2=A0PowerPCCPU *cpu =3D POWERPC_CPU(cs); > > > > +=C2=A0=C2=A0=C2=A0=C2=A0CPUPPCState *env =3D &cpu->env; > > > > + > > > > +=C2=A0=C2=A0=C2=A0=C2=A0cpu_synchronize_state(cs); > > > > +=C2=A0=C2=A0=C2=A0=C2=A0env->spr[SPR_HMER] |=3D hmer_bits; > > > > + > > > > +=C2=A0=C2=A0=C2=A0=C2=A0/* XXX Need a CPU helper to set HMER, al= so handle gneeration > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* of HMIs > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0*/ > >=20 > > Ben,=C2=A0 > >=20 > > The CPU helper would be to replicate the value of the SPR_HMER in all > > the threads of the core I guess ?=C2=A0 > >=20 > > Thanks, > >=20 > > C. > >=20