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diff for duplicates of <1475680464.7320.44.camel@synopsys.com>

diff --git a/a/1.txt b/N1/1.txt
index 4c31377..3c7adf6 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
-Hi?Andy,
-what do you think about?these changes?
+Hi Andy,
+what do you think about these changes?
 
-On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
+On Thu, 2016-09-15 at 16:14 +0300, Eugeniy Paltsev wrote:
 > This patch is to address a proposal by Andy in this thread:
 > http://www.spinics.net/lists/dmaengine/msg10754.html
 > Split platform data to actual hardware properties, and platform
@@ -9,36 +9,36 @@ On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
 > Now we able to use quirks and hardware properties separately from
 > different sources (pdata, device tree or autoconfig registers)
 > 
-> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
+> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
 > ---
-> ?drivers/dma/dw/core.c????????????????| 31 +++++++++++++++-----------
-> ?drivers/dma/dw/platform.c????????????| 42 +++++++++++++++++++++-----
+>  drivers/dma/dw/core.c                | 31 +++++++++++++++-----------
+>  drivers/dma/dw/platform.c            | 42 +++++++++++++++++++++-----
 > ----------
-> ?include/linux/platform_data/dma-dw.h | 20 +++++++++++------
-> ?3 files changed, 57 insertions(+), 36 deletions(-)
+>  include/linux/platform_data/dma-dw.h | 20 +++++++++++------
+>  3 files changed, 57 insertions(+), 36 deletions(-)
 > 
 > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
 > index c2c0a61..9352735 100644
 > --- a/drivers/dma/dw/core.c
 > +++ b/drivers/dma/dw/core.c
 > @@ -1451,10 +1451,25 @@ int dw_dma_probe(struct dw_dma_chip *chip)
-> ?
-> ?	dw->regs = chip->regs;
-> ?	chip->dw = dw;
+>  
+>  	dw->regs = chip->regs;
+>  	chip->dw = dw;
 > +	/* Reassign the platform data pointer */
 > +	pdata = dw->pdata;
-> ?
-> ?	pm_runtime_get_sync(chip->dev);
-> ?
+>  
+>  	pm_runtime_get_sync(chip->dev);
+>  
 > -	if (!chip->pdata) {
 > +	if ((!chip->pdata) ||
-> +	???(chip->pdata && test_bit(QUIRKS_ONLY_USED, &chip->pdata-
+> +	   (chip->pdata && test_bit(QUIRKS_ONLY_USED, &chip->pdata-
 > >quirks))) {
 > +
 > +		/*
-> +		?* Fill quirks with the default values in case of
+> +		 * Fill quirks with the default values in case of
 > pdata absence
-> +		?*/
+> +		 */
 > +		if (!chip->pdata) {
 > +			set_bit(QUIRKS_IS_PRIVATE, &pdata->quirks);
 > +			set_bit(QUIRKS_IS_MEMCPY, &pdata->quirks);
@@ -47,83 +47,83 @@ On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
 > +			pdata->quirks = chip->pdata->quirks;
 > +		}
 > +
-> ?		dw_params = dma_readl(dw, DW_PARAMS);
-> ?		dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n",
+>  		dw_params = dma_readl(dw, DW_PARAMS);
+>  		dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n",
 > dw_params);
-> ?
+>  
 > @@ -1464,9 +1479,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
-> ?			goto err_pdata;
-> ?		}
-> ?
+>  			goto err_pdata;
+>  		}
+>  
 > -		/* Reassign the platform data pointer */
 > -		pdata = dw->pdata;
 > -
-> ?		/* Get hardware configuration parameters */
-> ?		pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN
+>  		/* Get hardware configuration parameters */
+>  		pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN
 > & 7) + 1;
-> ?		pdata->nr_masters = (dw_params >>
+>  		pdata->nr_masters = (dw_params >>
 > DW_PARAMS_NR_MASTER & 3) + 1;
 > @@ -1477,8 +1489,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
-> ?		pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
-> ?
-> ?		/* Fill platform data with the default values */
+>  		pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
+>  
+>  		/* Fill platform data with the default values */
 > -		pdata->is_private = true;
 > -		pdata->is_memcpy = true;
-> ?		pdata->chan_allocation_order =
+>  		pdata->chan_allocation_order =
 > CHAN_ALLOCATION_ASCENDING;
-> ?		pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
-> ?	} else if (chip->pdata->nr_channels >
+>  		pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
+>  	} else if (chip->pdata->nr_channels >
 > DW_DMA_MAX_NR_CHANNELS) {
 > @@ -1486,9 +1496,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
-> ?		goto err_pdata;
-> ?	} else {
-> ?		memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));
+>  		goto err_pdata;
+>  	} else {
+>  		memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));
 > -
 > -		/* Reassign the platform data pointer */
 > -		pdata = dw->pdata;
-> ?	}
-> ?
-> ?	dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels,
+>  	}
+>  
+>  	dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels,
 > sizeof(*dw->chan),
 > @@ -1569,7 +1576,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
-> ?				(dwc_params >> DWC_PARAMS_MBLK_EN &
+>  				(dwc_params >> DWC_PARAMS_MBLK_EN &
 > 0x1) == 0;
-> ?		} else {
-> ?			dwc->block_size = pdata->block_size;
+>  		} else {
+>  			dwc->block_size = pdata->block_size;
 > -			dwc->nollp = pdata->is_nollp;
 > +			dwc->nollp = test_bit(QUIRKS_IS_NOLLP,
 > &pdata->quirks);
-> ?		}
-> ?	}
-> ?
+>  		}
+>  	}
+>  
 > @@ -1582,9 +1589,9 @@ int dw_dma_probe(struct dw_dma_chip *chip)
-> ?
-> ?	/* Set capabilities */
-> ?	dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
+>  
+>  	/* Set capabilities */
+>  	dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
 > -	if (pdata->is_private)
 > +	if (test_bit(QUIRKS_IS_PRIVATE, &pdata->quirks))
-> ?		dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
+>  		dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
 > -	if (pdata->is_memcpy)
 > +	if (test_bit(QUIRKS_IS_MEMCPY, &pdata->quirks))
-> ?		dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
-> ?
-> ?	dw->dma.dev = chip->dev;
+>  		dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
+>  
+>  	dw->dma.dev = chip->dev;
 > diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
 > index 5bda0eb..308b977 100644
 > --- a/drivers/dma/dw/platform.c
 > +++ b/drivers/dma/dw/platform.c
 > @@ -12,6 +12,7 @@
-> ? * published by the Free Software Foundation.
-> ? */
-> ?
+>   * published by the Free Software Foundation.
+>   */
+>  
 > +#include <linux/bitops.h>
-> ?#include <linux/module.h>
-> ?#include <linux/device.h>
-> ?#include <linux/clk.h>
+>  #include <linux/module.h>
+>  #include <linux/device.h>
+>  #include <linux/clk.h>
 > @@ -111,41 +112,48 @@ dw_dma_parse_dt(struct platform_device *pdev)
-> ?		return NULL;
-> ?	}
-> ?
+>  		return NULL;
+>  	}
+>  
 > -	if (of_property_read_u32(np, "dma-masters", &nr_masters))
 > -		return NULL;
 > -	if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
@@ -132,11 +132,11 @@ On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
 > -	if (of_property_read_u32(np, "dma-channels", &nr_channels))
 > -		return NULL;
 > -
-> ?	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),
+>  	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),
 > GFP_KERNEL);
-> ?	if (!pdata)
-> ?		return NULL;
-> ?
+>  	if (!pdata)
+>  		return NULL;
+>  
 > +	set_bit(QUIRKS_ONLY_USED, &pdata->quirks);
 > +
 > +	if (of_property_read_bool(np, "is-private"))
@@ -153,54 +153,54 @@ On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
 > +	if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
 > +		return pdata;
 > +
-> ?	pdata->nr_masters = nr_masters;
+>  	pdata->nr_masters = nr_masters;
 > -	pdata->nr_channels = nr_channels;
-> ?
+>  
 > -	if (of_property_read_bool(np, "is_private"))
 > -		pdata->is_private = true;
 > +	if (of_property_read_u32(np, "dma-channels", &nr_channels))
 > +		return pdata;
-> ?
+>  
 > -	if (!of_property_read_u32(np, "chan_allocation_order",
 > &tmp))
 > +	pdata->nr_channels = nr_channels;
 > +
 > +	if (!of_property_read_u32(np, "chan-allocation-order",
 > &tmp))
-> ?		pdata->chan_allocation_order = (unsigned char)tmp;
-> ?
+>  		pdata->chan_allocation_order = (unsigned char)tmp;
+>  
 > -	if (!of_property_read_u32(np, "chan_priority", &tmp))
 > +	if (!of_property_read_u32(np, "chan-priority", &tmp))
-> ?		pdata->chan_priority = tmp;
-> ?
+>  		pdata->chan_priority = tmp;
+>  
 > -	if (!of_property_read_u32(np, "block_size", &tmp))
 > +	if (!of_property_read_u32(np, "block-size", &tmp))
-> ?		pdata->block_size = tmp;
-> ?
-> ?	if (!of_property_read_u32_array(np, "data-width", arr,
+>  		pdata->block_size = tmp;
+>  
+>  	if (!of_property_read_u32_array(np, "data-width", arr,
 > nr_masters)) {
-> ?		for (tmp = 0; tmp < nr_masters; tmp++)
-> ?			pdata->data_width[tmp] = arr[tmp];
+>  		for (tmp = 0; tmp < nr_masters; tmp++)
+>  			pdata->data_width[tmp] = arr[tmp];
 > -	} else if (!of_property_read_u32_array(np, "data_width",
 > arr, nr_masters)) {
 > -		for (tmp = 0; tmp < nr_masters; tmp++)
 > -			pdata->data_width[tmp] = BIT(arr[tmp] &
 > 0x07);
-> ?	}
-> ?
+>  	}
+>  
 > +	clear_bit(QUIRKS_ONLY_USED, &pdata->quirks);
-> ?	return pdata;
-> ?}
-> ?#else
+>  	return pdata;
+>  }
+>  #else
 > diff --git a/include/linux/platform_data/dma-dw.h
 > b/include/linux/platform_data/dma-dw.h
 > index 5f0e11e..9cd8199 100644
 > --- a/include/linux/platform_data/dma-dw.h
 > +++ b/include/linux/platform_data/dma-dw.h
 > @@ -37,10 +37,7 @@ struct dw_dma_slave {
-> ?/**
-> ? * struct dw_dma_platform_data - Controller configuration parameters
-> ? * @nr_channels: Number of channels supported by hardware (max 8)
+>  /**
+>   * struct dw_dma_platform_data - Controller configuration parameters
+>   * @nr_channels: Number of channels supported by hardware (max 8)
 > - * @is_private: The device channels should be marked as private and
 > not for
 > - *	by the general purpose DMA channel allocator.
@@ -209,14 +209,14 @@ On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
 > - * @is_nollp: The device channels does not support multi block
 > transfers.
 > + * @quirks: Bit field with platform quirks
-> ? * @chan_allocation_order: Allocate channels starting from 0 or 7
-> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7
+>   * @chan_allocation_order: Allocate channels starting from 0 or 7
+>   * @chan_priority: Set channel priority increasing from 0 to 7 or 7
 > to 0.
-> ? * @block_size: Maximum block size supported by the controller
+>   * @block_size: Maximum block size supported by the controller
 > @@ -50,9 +47,18 @@ struct dw_dma_slave {
-> ? */
-> ?struct dw_dma_platform_data {
-> ?	unsigned int	nr_channels;
+>   */
+>  struct dw_dma_platform_data {
+>  	unsigned int	nr_channels;
 > -	bool		is_private;
 > -	bool		is_memcpy;
 > -	bool		is_nollp;
@@ -232,10 +232,10 @@ On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:
 > +/* The device channels do not support multi block transfers. */
 > +#define QUIRKS_IS_NOLLP		3
 > +	unsigned long	quirks;
-> ?#define CHAN_ALLOCATION_ASCENDING	0	/* zero to seven
+>  #define CHAN_ALLOCATION_ASCENDING	0	/* zero to seven
 > */
-> ?#define CHAN_ALLOCATION_DESCENDING	1	/* seven to zero
+>  #define CHAN_ALLOCATION_DESCENDING	1	/* seven to zero
 > */
-> ?	unsigned char	chan_allocation_order;
+>  	unsigned char	chan_allocation_order;
 -- 
-?Paltsev Eugeniy
+ Paltsev Eugeniy
diff --git a/a/content_digest b/N1/content_digest
index 780c248..9af72aa 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,14 +1,21 @@
  "ref\01473945253-16649-1-git-send-email-Eugeniy.Paltsev@synopsys.com\0"
- "From\0Eugeniy.Paltsev@synopsys.com (Eugeniy Paltsev)\0"
- "Subject\0[PATCH] dmaengine: DW DMAC: split pdata to hardware properties and platform quirks\0"
+ "From\0Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\0"
+ "Subject\0Re: [PATCH] dmaengine: DW DMAC: split pdata to hardware properties and platform quirks\0"
  "Date\0Wed, 5 Oct 2016 15:14:25 +0000\0"
- "To\0linux-snps-arc@lists.infradead.org\0"
+ "To\0andriy.shevchenko@linux.intel.com <andriy.shevchenko@linux.intel.com>\0"
+ "Cc\0dan.j.williams@intel.com <dan.j.williams@intel.com>"
+  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
+  Eugeniy.Paltsev@synopsys.com <Eugeniy.Paltsev@synopsys.com>
+  vireshk@kernel.org <vireshk@kernel.org>
+  vinod.koul@intel.com <vinod.koul@intel.com>
+  linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>
+ " dmaengine@vger.kernel.org <dmaengine@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
- "Hi?Andy,\n"
- "what do you think about?these changes?\n"
+ "Hi\302\240Andy,\n"
+ "what do you think about\302\240these changes?\n"
  "\n"
- "On Thu, 2016-09-15@16:14 +0300, Eugeniy Paltsev wrote:\n"
+ "On Thu, 2016-09-15 at 16:14 +0300, Eugeniy Paltsev wrote:\n"
  "> This patch is to address a proposal by Andy in this thread:\n"
  "> http://www.spinics.net/lists/dmaengine/msg10754.html\n"
  "> Split platform data to actual hardware properties, and platform\n"
@@ -16,36 +23,36 @@
  "> Now we able to use quirks and hardware properties separately from\n"
  "> different sources (pdata, device tree or autoconfig registers)\n"
  "> \n"
- "> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>\n"
+ "> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\n"
  "> ---\n"
- "> ?drivers/dma/dw/core.c????????????????| 31 +++++++++++++++-----------\n"
- "> ?drivers/dma/dw/platform.c????????????| 42 +++++++++++++++++++++-----\n"
+ "> \302\240drivers/dma/dw/core.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 31 +++++++++++++++-----------\n"
+ "> \302\240drivers/dma/dw/platform.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 42 +++++++++++++++++++++-----\n"
  "> ----------\n"
- "> ?include/linux/platform_data/dma-dw.h | 20 +++++++++++------\n"
- "> ?3 files changed, 57 insertions(+), 36 deletions(-)\n"
+ "> \302\240include/linux/platform_data/dma-dw.h | 20 +++++++++++------\n"
+ "> \302\2403 files changed, 57 insertions(+), 36 deletions(-)\n"
  "> \n"
  "> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c\n"
  "> index c2c0a61..9352735 100644\n"
  "> --- a/drivers/dma/dw/core.c\n"
  "> +++ b/drivers/dma/dw/core.c\n"
  "> @@ -1451,10 +1451,25 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n"
- "> ?\n"
- "> ?\tdw->regs = chip->regs;\n"
- "> ?\tchip->dw = dw;\n"
+ "> \302\240\n"
+ "> \302\240\tdw->regs = chip->regs;\n"
+ "> \302\240\tchip->dw = dw;\n"
  "> +\t/* Reassign the platform data pointer */\n"
  "> +\tpdata = dw->pdata;\n"
- "> ?\n"
- "> ?\tpm_runtime_get_sync(chip->dev);\n"
- "> ?\n"
+ "> \302\240\n"
+ "> \302\240\tpm_runtime_get_sync(chip->dev);\n"
+ "> \302\240\n"
  "> -\tif (!chip->pdata) {\n"
  "> +\tif ((!chip->pdata) ||\n"
- "> +\t???(chip->pdata && test_bit(QUIRKS_ONLY_USED, &chip->pdata-\n"
+ "> +\t\302\240\302\240\302\240(chip->pdata && test_bit(QUIRKS_ONLY_USED, &chip->pdata-\n"
  "> >quirks))) {\n"
  "> +\n"
  "> +\t\t/*\n"
- "> +\t\t?* Fill quirks with the default values in case of\n"
+ "> +\t\t\302\240* Fill quirks with the default values in case of\n"
  "> pdata absence\n"
- "> +\t\t?*/\n"
+ "> +\t\t\302\240*/\n"
  "> +\t\tif (!chip->pdata) {\n"
  "> +\t\t\tset_bit(QUIRKS_IS_PRIVATE, &pdata->quirks);\n"
  "> +\t\t\tset_bit(QUIRKS_IS_MEMCPY, &pdata->quirks);\n"
@@ -54,83 +61,83 @@
  "> +\t\t\tpdata->quirks = chip->pdata->quirks;\n"
  "> +\t\t}\n"
  "> +\n"
- "> ?\t\tdw_params = dma_readl(dw, DW_PARAMS);\n"
- "> ?\t\tdev_dbg(chip->dev, \"DW_PARAMS: 0x%08x\\n\",\n"
+ "> \302\240\t\tdw_params = dma_readl(dw, DW_PARAMS);\n"
+ "> \302\240\t\tdev_dbg(chip->dev, \"DW_PARAMS: 0x%08x\\n\",\n"
  "> dw_params);\n"
- "> ?\n"
+ "> \302\240\n"
  "> @@ -1464,9 +1479,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n"
- "> ?\t\t\tgoto err_pdata;\n"
- "> ?\t\t}\n"
- "> ?\n"
+ "> \302\240\t\t\tgoto err_pdata;\n"
+ "> \302\240\t\t}\n"
+ "> \302\240\n"
  "> -\t\t/* Reassign the platform data pointer */\n"
  "> -\t\tpdata = dw->pdata;\n"
  "> -\n"
- "> ?\t\t/* Get hardware configuration parameters */\n"
- "> ?\t\tpdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN\n"
+ "> \302\240\t\t/* Get hardware configuration parameters */\n"
+ "> \302\240\t\tpdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN\n"
  "> & 7) + 1;\n"
- "> ?\t\tpdata->nr_masters = (dw_params >>\n"
+ "> \302\240\t\tpdata->nr_masters = (dw_params >>\n"
  "> DW_PARAMS_NR_MASTER & 3) + 1;\n"
  "> @@ -1477,8 +1489,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n"
- "> ?\t\tpdata->block_size = dma_readl(dw, MAX_BLK_SIZE);\n"
- "> ?\n"
- "> ?\t\t/* Fill platform data with the default values */\n"
+ "> \302\240\t\tpdata->block_size = dma_readl(dw, MAX_BLK_SIZE);\n"
+ "> \302\240\n"
+ "> \302\240\t\t/* Fill platform data with the default values */\n"
  "> -\t\tpdata->is_private = true;\n"
  "> -\t\tpdata->is_memcpy = true;\n"
- "> ?\t\tpdata->chan_allocation_order =\n"
+ "> \302\240\t\tpdata->chan_allocation_order =\n"
  "> CHAN_ALLOCATION_ASCENDING;\n"
- "> ?\t\tpdata->chan_priority = CHAN_PRIORITY_ASCENDING;\n"
- "> ?\t} else if (chip->pdata->nr_channels >\n"
+ "> \302\240\t\tpdata->chan_priority = CHAN_PRIORITY_ASCENDING;\n"
+ "> \302\240\t} else if (chip->pdata->nr_channels >\n"
  "> DW_DMA_MAX_NR_CHANNELS) {\n"
  "> @@ -1486,9 +1496,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n"
- "> ?\t\tgoto err_pdata;\n"
- "> ?\t} else {\n"
- "> ?\t\tmemcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));\n"
+ "> \302\240\t\tgoto err_pdata;\n"
+ "> \302\240\t} else {\n"
+ "> \302\240\t\tmemcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));\n"
  "> -\n"
  "> -\t\t/* Reassign the platform data pointer */\n"
  "> -\t\tpdata = dw->pdata;\n"
- "> ?\t}\n"
- "> ?\n"
- "> ?\tdw->chan = devm_kcalloc(chip->dev, pdata->nr_channels,\n"
+ "> \302\240\t}\n"
+ "> \302\240\n"
+ "> \302\240\tdw->chan = devm_kcalloc(chip->dev, pdata->nr_channels,\n"
  "> sizeof(*dw->chan),\n"
  "> @@ -1569,7 +1576,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n"
- "> ?\t\t\t\t(dwc_params >> DWC_PARAMS_MBLK_EN &\n"
+ "> \302\240\t\t\t\t(dwc_params >> DWC_PARAMS_MBLK_EN &\n"
  "> 0x1) == 0;\n"
- "> ?\t\t} else {\n"
- "> ?\t\t\tdwc->block_size = pdata->block_size;\n"
+ "> \302\240\t\t} else {\n"
+ "> \302\240\t\t\tdwc->block_size = pdata->block_size;\n"
  "> -\t\t\tdwc->nollp = pdata->is_nollp;\n"
  "> +\t\t\tdwc->nollp = test_bit(QUIRKS_IS_NOLLP,\n"
  "> &pdata->quirks);\n"
- "> ?\t\t}\n"
- "> ?\t}\n"
- "> ?\n"
+ "> \302\240\t\t}\n"
+ "> \302\240\t}\n"
+ "> \302\240\n"
  "> @@ -1582,9 +1589,9 @@ int dw_dma_probe(struct dw_dma_chip *chip)\n"
- "> ?\n"
- "> ?\t/* Set capabilities */\n"
- "> ?\tdma_cap_set(DMA_SLAVE, dw->dma.cap_mask);\n"
+ "> \302\240\n"
+ "> \302\240\t/* Set capabilities */\n"
+ "> \302\240\tdma_cap_set(DMA_SLAVE, dw->dma.cap_mask);\n"
  "> -\tif (pdata->is_private)\n"
  "> +\tif (test_bit(QUIRKS_IS_PRIVATE, &pdata->quirks))\n"
- "> ?\t\tdma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);\n"
+ "> \302\240\t\tdma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);\n"
  "> -\tif (pdata->is_memcpy)\n"
  "> +\tif (test_bit(QUIRKS_IS_MEMCPY, &pdata->quirks))\n"
- "> ?\t\tdma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);\n"
- "> ?\n"
- "> ?\tdw->dma.dev = chip->dev;\n"
+ "> \302\240\t\tdma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);\n"
+ "> \302\240\n"
+ "> \302\240\tdw->dma.dev = chip->dev;\n"
  "> diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c\n"
  "> index 5bda0eb..308b977 100644\n"
  "> --- a/drivers/dma/dw/platform.c\n"
  "> +++ b/drivers/dma/dw/platform.c\n"
  "> @@ -12,6 +12,7 @@\n"
- "> ? * published by the Free Software Foundation.\n"
- "> ? */\n"
- "> ?\n"
+ "> \302\240 * published by the Free Software Foundation.\n"
+ "> \302\240 */\n"
+ "> \302\240\n"
  "> +#include <linux/bitops.h>\n"
- "> ?#include <linux/module.h>\n"
- "> ?#include <linux/device.h>\n"
- "> ?#include <linux/clk.h>\n"
+ "> \302\240#include <linux/module.h>\n"
+ "> \302\240#include <linux/device.h>\n"
+ "> \302\240#include <linux/clk.h>\n"
  "> @@ -111,41 +112,48 @@ dw_dma_parse_dt(struct platform_device *pdev)\n"
- "> ?\t\treturn NULL;\n"
- "> ?\t}\n"
- "> ?\n"
+ "> \302\240\t\treturn NULL;\n"
+ "> \302\240\t}\n"
+ "> \302\240\n"
  "> -\tif (of_property_read_u32(np, \"dma-masters\", &nr_masters))\n"
  "> -\t\treturn NULL;\n"
  "> -\tif (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)\n"
@@ -139,11 +146,11 @@
  "> -\tif (of_property_read_u32(np, \"dma-channels\", &nr_channels))\n"
  "> -\t\treturn NULL;\n"
  "> -\n"
- "> ?\tpdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),\n"
+ "> \302\240\tpdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),\n"
  "> GFP_KERNEL);\n"
- "> ?\tif (!pdata)\n"
- "> ?\t\treturn NULL;\n"
- "> ?\n"
+ "> \302\240\tif (!pdata)\n"
+ "> \302\240\t\treturn NULL;\n"
+ "> \302\240\n"
  "> +\tset_bit(QUIRKS_ONLY_USED, &pdata->quirks);\n"
  "> +\n"
  "> +\tif (of_property_read_bool(np, \"is-private\"))\n"
@@ -160,54 +167,54 @@
  "> +\tif (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)\n"
  "> +\t\treturn pdata;\n"
  "> +\n"
- "> ?\tpdata->nr_masters = nr_masters;\n"
+ "> \302\240\tpdata->nr_masters = nr_masters;\n"
  "> -\tpdata->nr_channels = nr_channels;\n"
- "> ?\n"
+ "> \302\240\n"
  "> -\tif (of_property_read_bool(np, \"is_private\"))\n"
  "> -\t\tpdata->is_private = true;\n"
  "> +\tif (of_property_read_u32(np, \"dma-channels\", &nr_channels))\n"
  "> +\t\treturn pdata;\n"
- "> ?\n"
+ "> \302\240\n"
  "> -\tif (!of_property_read_u32(np, \"chan_allocation_order\",\n"
  "> &tmp))\n"
  "> +\tpdata->nr_channels = nr_channels;\n"
  "> +\n"
  "> +\tif (!of_property_read_u32(np, \"chan-allocation-order\",\n"
  "> &tmp))\n"
- "> ?\t\tpdata->chan_allocation_order = (unsigned char)tmp;\n"
- "> ?\n"
+ "> \302\240\t\tpdata->chan_allocation_order = (unsigned char)tmp;\n"
+ "> \302\240\n"
  "> -\tif (!of_property_read_u32(np, \"chan_priority\", &tmp))\n"
  "> +\tif (!of_property_read_u32(np, \"chan-priority\", &tmp))\n"
- "> ?\t\tpdata->chan_priority = tmp;\n"
- "> ?\n"
+ "> \302\240\t\tpdata->chan_priority = tmp;\n"
+ "> \302\240\n"
  "> -\tif (!of_property_read_u32(np, \"block_size\", &tmp))\n"
  "> +\tif (!of_property_read_u32(np, \"block-size\", &tmp))\n"
- "> ?\t\tpdata->block_size = tmp;\n"
- "> ?\n"
- "> ?\tif (!of_property_read_u32_array(np, \"data-width\", arr,\n"
+ "> \302\240\t\tpdata->block_size = tmp;\n"
+ "> \302\240\n"
+ "> \302\240\tif (!of_property_read_u32_array(np, \"data-width\", arr,\n"
  "> nr_masters)) {\n"
- "> ?\t\tfor (tmp = 0; tmp < nr_masters; tmp++)\n"
- "> ?\t\t\tpdata->data_width[tmp] = arr[tmp];\n"
+ "> \302\240\t\tfor (tmp = 0; tmp < nr_masters; tmp++)\n"
+ "> \302\240\t\t\tpdata->data_width[tmp] = arr[tmp];\n"
  "> -\t} else if (!of_property_read_u32_array(np, \"data_width\",\n"
  "> arr, nr_masters)) {\n"
  "> -\t\tfor (tmp = 0; tmp < nr_masters; tmp++)\n"
  "> -\t\t\tpdata->data_width[tmp] = BIT(arr[tmp] &\n"
  "> 0x07);\n"
- "> ?\t}\n"
- "> ?\n"
+ "> \302\240\t}\n"
+ "> \302\240\n"
  "> +\tclear_bit(QUIRKS_ONLY_USED, &pdata->quirks);\n"
- "> ?\treturn pdata;\n"
- "> ?}\n"
- "> ?#else\n"
+ "> \302\240\treturn pdata;\n"
+ "> \302\240}\n"
+ "> \302\240#else\n"
  "> diff --git a/include/linux/platform_data/dma-dw.h\n"
  "> b/include/linux/platform_data/dma-dw.h\n"
  "> index 5f0e11e..9cd8199 100644\n"
  "> --- a/include/linux/platform_data/dma-dw.h\n"
  "> +++ b/include/linux/platform_data/dma-dw.h\n"
  "> @@ -37,10 +37,7 @@ struct dw_dma_slave {\n"
- "> ?/**\n"
- "> ? * struct dw_dma_platform_data - Controller configuration parameters\n"
- "> ? * @nr_channels: Number of channels supported by hardware (max 8)\n"
+ "> \302\240/**\n"
+ "> \302\240 * struct dw_dma_platform_data - Controller configuration parameters\n"
+ "> \302\240 * @nr_channels: Number of channels supported by hardware (max 8)\n"
  "> - * @is_private: The device channels should be marked as private and\n"
  "> not for\n"
  "> - *\tby the general purpose DMA channel allocator.\n"
@@ -216,14 +223,14 @@
  "> - * @is_nollp: The device channels does not support multi block\n"
  "> transfers.\n"
  "> + * @quirks: Bit field with platform quirks\n"
- "> ? * @chan_allocation_order: Allocate channels starting from 0 or 7\n"
- "> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n"
+ "> \302\240 * @chan_allocation_order: Allocate channels starting from 0 or 7\n"
+ "> \302\240 * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n"
  "> to 0.\n"
- "> ? * @block_size: Maximum block size supported by the controller\n"
+ "> \302\240 * @block_size: Maximum block size supported by the controller\n"
  "> @@ -50,9 +47,18 @@ struct dw_dma_slave {\n"
- "> ? */\n"
- "> ?struct dw_dma_platform_data {\n"
- "> ?\tunsigned int\tnr_channels;\n"
+ "> \302\240 */\n"
+ "> \302\240struct dw_dma_platform_data {\n"
+ "> \302\240\tunsigned int\tnr_channels;\n"
  "> -\tbool\t\tis_private;\n"
  "> -\tbool\t\tis_memcpy;\n"
  "> -\tbool\t\tis_nollp;\n"
@@ -239,12 +246,12 @@
  "> +/* The device channels do not support multi block transfers. */\n"
  "> +#define QUIRKS_IS_NOLLP\t\t3\n"
  "> +\tunsigned long\tquirks;\n"
- "> ?#define CHAN_ALLOCATION_ASCENDING\t0\t/* zero to seven\n"
+ "> \302\240#define CHAN_ALLOCATION_ASCENDING\t0\t/* zero to seven\n"
  "> */\n"
- "> ?#define CHAN_ALLOCATION_DESCENDING\t1\t/* seven to zero\n"
+ "> \302\240#define CHAN_ALLOCATION_DESCENDING\t1\t/* seven to zero\n"
  "> */\n"
- "> ?\tunsigned char\tchan_allocation_order;\n"
+ "> \302\240\tunsigned char\tchan_allocation_order;\n"
  "-- \n"
- ?Paltsev Eugeniy
+ "\302\240Paltsev Eugeniy"
 
-a8e5d7c86e3f63293778717ccff22f87957f85344c9064b730daffb19bf4140f
+50066b5e9552b79e3a84d30eda9aa1b3ccac724436c39fe88275ae3b71936b48

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