diff for duplicates of <1475713112.3784.183.camel@kernel.crashing.org> diff --git a/a/1.txt b/N1/1.txt index 03319b2..0284ff1 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,18 +1,20 @@ -T24gVHVlLCAyMDE2LTEwLTA0IGF0IDEzOjAyICswMTAwLCBKb2huIEdhcnJ5IHdyb3RlOgo+IFJp -Z2h0LCBzbyBJIHRoaW5rIFpoaWNoYW5nIGNhbiBtYWtlIHRoZSBuZWNlc3NhcnkgZ2VuZXJpYyBj -aGFuZ2VzIHRvwqAKPiA4MjUwIE9GIGRyaXZlciB0byBzdXBwb3J0IElPIHBvcnQgYXMgd2VsbCBh -cyBNTUlPLWJhc2VkLgo+IAo+IEhvd2V2ZXIgYW4gTFBDLWJhc2VkIGVhcmx5Y29uIGRyaXZlciBp -cyBzdGlsbCByZXF1aXJlZC4KPiAKPiBBIG5vdGUgb24gaGlwMDctYmFzZWQgRDA1IChmb3IgdGhv -c2UgdW5hd2FyZSk6IHRoaXMgZG9lcyBub3QgdXNlwqAKPiBMUEMtYmFzZWQgdWFydC4gSXQgdXNl -cyBQTDAxMS4gVGhlIGhhcmR3YXJlIGd1eXMgaGF2ZSBtYW5hZ2VkIHNvbWXCoAo+IHRyaWNrZXJ5 -IHdoZXJlIHRoZXkgbG9vcGJhY2sgdGhlIHNlcmlhbCBsaW5lIGFyb3VuZCB0aGUgQk1DL0NQTEQu -IEJ1dCB3ZcKgCj4gc3RpbGwgbmVlZCBpdCBmb3IgaGlwMDYgRDAzIGFuZCBhbnkgb3RoZXIgYm9h -cmRzIHdoaWNoIHdhbnQgdG8gdXNlIExQQ8KgCj4gYnVzIGZvciB1YXJ0Lgo+IAo+IEEgcXVlc3Rp -b24gb24gU0JTQTogZG9lcyBpdCBwcm9wb3NlIGhvdyB0byBwcm92aWRlIHNlcmlhbCB2aWEgQk1D -IGZvciBTT0w/CgpQcm9iYWJseSBhbm90aGVyIHJlYXNvbiB0byBrZWVwIDgyNTAgYXMgYSBsZWdh -bCBvcHRpb24gLi4uIFRoZSAodmVyeQpwb3B1bGFyKSBBc3BlZWQgQk1DcyB0ZW5kIHRvIGRvIHRo -aXMgdmlhIGEgODI1MC1sb29raW5nIHZpcnR1YWwgVUFSVCBvbgpMUEMuCgpDaGVlcnMsCkJlbiwK -CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h -cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v -cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t -a2VybmVsCg== +On Tue, 2016-10-04 at 13:02 +0100, John Garry wrote: +> Right, so I think Zhichang can make the necessary generic changes to +> 8250 OF driver to support IO port as well as MMIO-based. +> +> However an LPC-based earlycon driver is still required. +> +> A note on hip07-based D05 (for those unaware): this does not use +> LPC-based uart. It uses PL011. The hardware guys have managed some +> trickery where they loopback the serial line around the BMC/CPLD. But we +> still need it for hip06 D03 and any other boards which want to use LPC +> bus for uart. +> +> A question on SBSA: does it propose how to provide serial via BMC for SOL? + +Probably another reason to keep 8250 as a legal option ... The (very +popular) Aspeed BMCs tend to do this via a 8250-looking virtual UART on +LPC. + +Cheers, +Ben, diff --git a/a/content_digest b/N1/content_digest index 262f014..b88e209 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -11,41 +11,43 @@ Jon Masters <jcm@jonmasters.org> Arnd Bergmann <arnd@arndb.de> " linux-arm-kernel@lists.infradead.org\0" - "Cc\0devicetree@vger.kernel.org" + "Cc\0zhichang.yuan <yuanzhichang@hisilicon.com>" + devicetree@vger.kernel.org lorenzo.pieralisi@arm.com gabriele.paoloni@huawei.com minyard@acm.org gregkh@linuxfoundation.org - zhichang.yuan02@gmail.com will.deacon@arm.com linux-kernel@vger.kernel.org - zhichang.yuan <yuanzhichang@hisilicon.com> - linuxarm@huawei.com xuwei5@hisilicon.com + linuxarm@huawei.com linux-serial@vger.kernel.org linux-pci@vger.kernel.org zourongrong@gmail.com liviu.dudau@arm.com - " kantyzc@163.com\0" + kantyzc@163.com + " zhichang.yuan02@gmail.com\0" "\00:1\0" "b\0" - "T24gVHVlLCAyMDE2LTEwLTA0IGF0IDEzOjAyICswMTAwLCBKb2huIEdhcnJ5IHdyb3RlOgo+IFJp\n" - "Z2h0LCBzbyBJIHRoaW5rIFpoaWNoYW5nIGNhbiBtYWtlIHRoZSBuZWNlc3NhcnkgZ2VuZXJpYyBj\n" - "aGFuZ2VzIHRvwqAKPiA4MjUwIE9GIGRyaXZlciB0byBzdXBwb3J0IElPIHBvcnQgYXMgd2VsbCBh\n" - "cyBNTUlPLWJhc2VkLgo+IAo+IEhvd2V2ZXIgYW4gTFBDLWJhc2VkIGVhcmx5Y29uIGRyaXZlciBp\n" - "cyBzdGlsbCByZXF1aXJlZC4KPiAKPiBBIG5vdGUgb24gaGlwMDctYmFzZWQgRDA1IChmb3IgdGhv\n" - "c2UgdW5hd2FyZSk6IHRoaXMgZG9lcyBub3QgdXNlwqAKPiBMUEMtYmFzZWQgdWFydC4gSXQgdXNl\n" - "cyBQTDAxMS4gVGhlIGhhcmR3YXJlIGd1eXMgaGF2ZSBtYW5hZ2VkIHNvbWXCoAo+IHRyaWNrZXJ5\n" - "IHdoZXJlIHRoZXkgbG9vcGJhY2sgdGhlIHNlcmlhbCBsaW5lIGFyb3VuZCB0aGUgQk1DL0NQTEQu\n" - "IEJ1dCB3ZcKgCj4gc3RpbGwgbmVlZCBpdCBmb3IgaGlwMDYgRDAzIGFuZCBhbnkgb3RoZXIgYm9h\n" - "cmRzIHdoaWNoIHdhbnQgdG8gdXNlIExQQ8KgCj4gYnVzIGZvciB1YXJ0Lgo+IAo+IEEgcXVlc3Rp\n" - "b24gb24gU0JTQTogZG9lcyBpdCBwcm9wb3NlIGhvdyB0byBwcm92aWRlIHNlcmlhbCB2aWEgQk1D\n" - "IGZvciBTT0w/CgpQcm9iYWJseSBhbm90aGVyIHJlYXNvbiB0byBrZWVwIDgyNTAgYXMgYSBsZWdh\n" - "bCBvcHRpb24gLi4uIFRoZSAodmVyeQpwb3B1bGFyKSBBc3BlZWQgQk1DcyB0ZW5kIHRvIGRvIHRo\n" - "aXMgdmlhIGEgODI1MC1sb29raW5nIHZpcnR1YWwgVUFSVCBvbgpMUEMuCgpDaGVlcnMsCkJlbiwK\n" - "CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h\n" - "cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v\n" - "cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t\n" - a2VybmVsCg== + "On Tue, 2016-10-04 at 13:02 +0100, John Garry wrote:\n" + "> Right, so I think Zhichang can make the necessary generic changes to\302\240\n" + "> 8250 OF driver to support IO port as well as MMIO-based.\n" + "> \n" + "> However an LPC-based earlycon driver is still required.\n" + "> \n" + "> A note on hip07-based D05 (for those unaware): this does not use\302\240\n" + "> LPC-based uart. It uses PL011. The hardware guys have managed some\302\240\n" + "> trickery where they loopback the serial line around the BMC/CPLD. But we\302\240\n" + "> still need it for hip06 D03 and any other boards which want to use LPC\302\240\n" + "> bus for uart.\n" + "> \n" + "> A question on SBSA: does it propose how to provide serial via BMC for SOL?\n" + "\n" + "Probably another reason to keep 8250 as a legal option ... The (very\n" + "popular) Aspeed BMCs tend to do this via a 8250-looking virtual UART on\n" + "LPC.\n" + "\n" + "Cheers,\n" + Ben, -ddac82400d2c4b90234bdeb27f44ac4644bfe07b5c300710d395af6d0b1a87e6 +3d4afd1249512641929d9b0e665850b67a9dbaac7c1032cb52e6f6a70bcf5041
diff --git a/a/1.txt b/N2/1.txt index 03319b2..e878185 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,18 +1,20 @@ -T24gVHVlLCAyMDE2LTEwLTA0IGF0IDEzOjAyICswMTAwLCBKb2huIEdhcnJ5IHdyb3RlOgo+IFJp -Z2h0LCBzbyBJIHRoaW5rIFpoaWNoYW5nIGNhbiBtYWtlIHRoZSBuZWNlc3NhcnkgZ2VuZXJpYyBj -aGFuZ2VzIHRvwqAKPiA4MjUwIE9GIGRyaXZlciB0byBzdXBwb3J0IElPIHBvcnQgYXMgd2VsbCBh -cyBNTUlPLWJhc2VkLgo+IAo+IEhvd2V2ZXIgYW4gTFBDLWJhc2VkIGVhcmx5Y29uIGRyaXZlciBp -cyBzdGlsbCByZXF1aXJlZC4KPiAKPiBBIG5vdGUgb24gaGlwMDctYmFzZWQgRDA1IChmb3IgdGhv -c2UgdW5hd2FyZSk6IHRoaXMgZG9lcyBub3QgdXNlwqAKPiBMUEMtYmFzZWQgdWFydC4gSXQgdXNl -cyBQTDAxMS4gVGhlIGhhcmR3YXJlIGd1eXMgaGF2ZSBtYW5hZ2VkIHNvbWXCoAo+IHRyaWNrZXJ5 -IHdoZXJlIHRoZXkgbG9vcGJhY2sgdGhlIHNlcmlhbCBsaW5lIGFyb3VuZCB0aGUgQk1DL0NQTEQu -IEJ1dCB3ZcKgCj4gc3RpbGwgbmVlZCBpdCBmb3IgaGlwMDYgRDAzIGFuZCBhbnkgb3RoZXIgYm9h -cmRzIHdoaWNoIHdhbnQgdG8gdXNlIExQQ8KgCj4gYnVzIGZvciB1YXJ0Lgo+IAo+IEEgcXVlc3Rp -b24gb24gU0JTQTogZG9lcyBpdCBwcm9wb3NlIGhvdyB0byBwcm92aWRlIHNlcmlhbCB2aWEgQk1D -IGZvciBTT0w/CgpQcm9iYWJseSBhbm90aGVyIHJlYXNvbiB0byBrZWVwIDgyNTAgYXMgYSBsZWdh -bCBvcHRpb24gLi4uIFRoZSAodmVyeQpwb3B1bGFyKSBBc3BlZWQgQk1DcyB0ZW5kIHRvIGRvIHRo -aXMgdmlhIGEgODI1MC1sb29raW5nIHZpcnR1YWwgVUFSVCBvbgpMUEMuCgpDaGVlcnMsCkJlbiwK -CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h -cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v -cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t -a2VybmVsCg== +On Tue, 2016-10-04 at 13:02 +0100, John Garry wrote: +> Right, so I think Zhichang can make the necessary generic changes to? +> 8250 OF driver to support IO port as well as MMIO-based. +> +> However an LPC-based earlycon driver is still required. +> +> A note on hip07-based D05 (for those unaware): this does not use? +> LPC-based uart. It uses PL011. The hardware guys have managed some? +> trickery where they loopback the serial line around the BMC/CPLD. But we? +> still need it for hip06 D03 and any other boards which want to use LPC? +> bus for uart. +> +> A question on SBSA: does it propose how to provide serial via BMC for SOL? + +Probably another reason to keep 8250 as a legal option ... The (very +popular) Aspeed BMCs tend to do this via a 8250-looking virtual UART on +LPC. + +Cheers, +Ben, diff --git a/a/content_digest b/N2/content_digest index 262f014..6b04276 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -4,48 +4,31 @@ "ref\05869118.UilSPY9Sai@wuerfel\0" "ref\02af4f2d8-e3a4-fa00-e700-60af70bf4560@jonmasters.org\0" "ref\06bbfeb57-7a55-6a3e-60b2-3f44525e5882@huawei.com\0" - "From\0Benjamin Herrenschmidt <benh@kernel.crashing.org>\0" - "Subject\0Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06\0" + "From\0benh@kernel.crashing.org (Benjamin Herrenschmidt)\0" + "Subject\0[PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06\0" "Date\0Thu, 06 Oct 2016 11:18:32 +1100\0" - "To\0John Garry <john.garry@huawei.com>" - Jon Masters <jcm@jonmasters.org> - Arnd Bergmann <arnd@arndb.de> - " linux-arm-kernel@lists.infradead.org\0" - "Cc\0devicetree@vger.kernel.org" - lorenzo.pieralisi@arm.com - gabriele.paoloni@huawei.com - minyard@acm.org - gregkh@linuxfoundation.org - zhichang.yuan02@gmail.com - will.deacon@arm.com - linux-kernel@vger.kernel.org - zhichang.yuan <yuanzhichang@hisilicon.com> - linuxarm@huawei.com - xuwei5@hisilicon.com - linux-serial@vger.kernel.org - linux-pci@vger.kernel.org - zourongrong@gmail.com - liviu.dudau@arm.com - " kantyzc@163.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "T24gVHVlLCAyMDE2LTEwLTA0IGF0IDEzOjAyICswMTAwLCBKb2huIEdhcnJ5IHdyb3RlOgo+IFJp\n" - "Z2h0LCBzbyBJIHRoaW5rIFpoaWNoYW5nIGNhbiBtYWtlIHRoZSBuZWNlc3NhcnkgZ2VuZXJpYyBj\n" - "aGFuZ2VzIHRvwqAKPiA4MjUwIE9GIGRyaXZlciB0byBzdXBwb3J0IElPIHBvcnQgYXMgd2VsbCBh\n" - "cyBNTUlPLWJhc2VkLgo+IAo+IEhvd2V2ZXIgYW4gTFBDLWJhc2VkIGVhcmx5Y29uIGRyaXZlciBp\n" - "cyBzdGlsbCByZXF1aXJlZC4KPiAKPiBBIG5vdGUgb24gaGlwMDctYmFzZWQgRDA1IChmb3IgdGhv\n" - "c2UgdW5hd2FyZSk6IHRoaXMgZG9lcyBub3QgdXNlwqAKPiBMUEMtYmFzZWQgdWFydC4gSXQgdXNl\n" - "cyBQTDAxMS4gVGhlIGhhcmR3YXJlIGd1eXMgaGF2ZSBtYW5hZ2VkIHNvbWXCoAo+IHRyaWNrZXJ5\n" - "IHdoZXJlIHRoZXkgbG9vcGJhY2sgdGhlIHNlcmlhbCBsaW5lIGFyb3VuZCB0aGUgQk1DL0NQTEQu\n" - "IEJ1dCB3ZcKgCj4gc3RpbGwgbmVlZCBpdCBmb3IgaGlwMDYgRDAzIGFuZCBhbnkgb3RoZXIgYm9h\n" - "cmRzIHdoaWNoIHdhbnQgdG8gdXNlIExQQ8KgCj4gYnVzIGZvciB1YXJ0Lgo+IAo+IEEgcXVlc3Rp\n" - "b24gb24gU0JTQTogZG9lcyBpdCBwcm9wb3NlIGhvdyB0byBwcm92aWRlIHNlcmlhbCB2aWEgQk1D\n" - "IGZvciBTT0w/CgpQcm9iYWJseSBhbm90aGVyIHJlYXNvbiB0byBrZWVwIDgyNTAgYXMgYSBsZWdh\n" - "bCBvcHRpb24gLi4uIFRoZSAodmVyeQpwb3B1bGFyKSBBc3BlZWQgQk1DcyB0ZW5kIHRvIGRvIHRo\n" - "aXMgdmlhIGEgODI1MC1sb29raW5nIHZpcnR1YWwgVUFSVCBvbgpMUEMuCgpDaGVlcnMsCkJlbiwK\n" - "CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h\n" - "cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v\n" - "cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t\n" - a2VybmVsCg== + "On Tue, 2016-10-04 at 13:02 +0100, John Garry wrote:\n" + "> Right, so I think Zhichang can make the necessary generic changes to?\n" + "> 8250 OF driver to support IO port as well as MMIO-based.\n" + "> \n" + "> However an LPC-based earlycon driver is still required.\n" + "> \n" + "> A note on hip07-based D05 (for those unaware): this does not use?\n" + "> LPC-based uart. It uses PL011. The hardware guys have managed some?\n" + "> trickery where they loopback the serial line around the BMC/CPLD. But we?\n" + "> still need it for hip06 D03 and any other boards which want to use LPC?\n" + "> bus for uart.\n" + "> \n" + "> A question on SBSA: does it propose how to provide serial via BMC for SOL?\n" + "\n" + "Probably another reason to keep 8250 as a legal option ... The (very\n" + "popular) Aspeed BMCs tend to do this via a 8250-looking virtual UART on\n" + "LPC.\n" + "\n" + "Cheers,\n" + Ben, -ddac82400d2c4b90234bdeb27f44ac4644bfe07b5c300710d395af6d0b1a87e6 +8faf7486b30d51f325cb6d397f111e5ee164cca088f7b09e9d8716ef2161ed69
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.