From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54463) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsNIT-0003ir-O6 for qemu-devel@nongnu.org; Fri, 07 Oct 2016 01:02:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bsNIM-0006Z8-4O for qemu-devel@nongnu.org; Fri, 07 Oct 2016 01:02:09 -0400 Message-ID: <1475816512.3784.244.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Fri, 07 Oct 2016 16:01:52 +1100 In-Reply-To: <20161007043221.GS18490@umbus.fritz.box> References: <1475479496-16158-1-git-send-email-clg@kaod.org> <1475479496-16158-4-git-send-email-clg@kaod.org> <20161007043221.GS18490@umbus.fritz.box> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson , =?ISO-8859-1?Q?C=E9dric?= Le Goater Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On Fri, 2016-10-07 at 15:32 +1100, David Gibson wrote: > On Mon, Oct 03, 2016 at 09:24:39AM +0200, C=C3=A9dric Le Goater wrote: > > This will be used to build real HW ids for the cores and enforce > some > > limits on the available cores per chip. >=20 > Is there actually a practical reason to allow the user (or machine > type) to override the default core mask? None other than mimmicing real HW ... some cores can be disabled on some chips and we *might* want to mimmic that for some test scenarios. Cheers, Ben.