All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Subject: [PATCH 8/9] drm/i915: Make intel_calculate_wm return unsigned int
Date: Fri,  7 Oct 2016 14:34:11 +0100	[thread overview]
Message-ID: <1475847252-31580-9-git-send-email-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <1475847252-31580-1-git-send-email-tvrtko.ursulin@linux.intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Either unsigned int is enough or it isn't. There is no point in
using an unsigned long here.

Also replace local long variables with integers. No need to have
a difference between 32- and 64-bit build in any case.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 36 +++++++++++++++++-------------------
 1 file changed, 17 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index faa379e54322..308edc4378fa 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -582,12 +582,12 @@ static const struct intel_watermark_params i845_wm_info = {
  * past the watermark point.  If the FIFO drains completely, a FIFO underrun
  * will occur, and a display engine hang could result.
  */
-static unsigned long intel_calculate_wm(unsigned int clock_in_khz,
-					const struct intel_watermark_params *wm,
-					unsigned int fifo_size, int cpp,
-					unsigned int latency_ns)
+static unsigned int intel_calculate_wm(unsigned int clock_in_khz,
+				       const struct intel_watermark_params *wm,
+				       unsigned int fifo_size, int cpp,
+				       unsigned int latency_ns)
 {
-	long entries_required, wm_size;
+	int entries_required, wm_size;
 
 	/*
 	 * Note: we need to make sure we don't overflow for various clock &
@@ -595,18 +595,17 @@ static unsigned long intel_calculate_wm(unsigned int clock_in_khz,
 	 * clocks go from a few thousand to several hundred thousand.
 	 * latency is usually a few thousand
 	 */
-	entries_required = ((clock_in_khz / 1000) * cpp * latency_ns) /
-		1000;
+	entries_required = ((clock_in_khz / 1000) * cpp * latency_ns) / 1000;
 	entries_required = DIV_ROUND_UP(entries_required, wm->cacheline_size);
 
-	DRM_DEBUG_KMS("FIFO entries required for mode: %ld\n", entries_required);
+	DRM_DEBUG_KMS("FIFO entries required for mode: %d\n", entries_required);
 
 	wm_size = fifo_size - (entries_required + wm->guard_size);
 
-	DRM_DEBUG_KMS("FIFO watermark level: %ld\n", wm_size);
+	DRM_DEBUG_KMS("FIFO watermark level: %d\n", wm_size);
 
 	/* Don't promote wm_size to unsigned... */
-	if (wm_size > (long)wm->max_wm)
+	if (wm_size > (int)wm->max_wm)
 		wm_size = wm->max_wm;
 	if (wm_size <= 0)
 		wm_size = wm->default_wm;
@@ -646,7 +645,7 @@ static void pineview_update_wm(struct drm_crtc *unused_crtc)
 	struct drm_crtc *crtc;
 	const struct cxsr_latency *latency;
 	u32 reg;
-	unsigned long wm;
+	unsigned int wm;
 
 	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev), dev_priv->is_ddr3,
 					 dev_priv->fsb_freq, dev_priv->mem_freq);
@@ -1522,8 +1521,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
 	uint32_t fwater_lo;
 	uint32_t fwater_hi;
 	int cwm, srwm = 1;
-	unsigned int fifo_size;
-	int planea_wm, planeb_wm;
+	unsigned int fifo_size, planea_wm, planeb_wm;
 	struct drm_crtc *crtc, *enabled = NULL;
 
 	if (IS_I945GM(dev))
@@ -1548,7 +1546,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
 		enabled = crtc;
 	} else {
 		planea_wm = fifo_size - wm_info->guard_size;
-		if (planea_wm > (long)wm_info->max_wm)
+		if (planea_wm > wm_info->max_wm)
 			planea_wm = wm_info->max_wm;
 	}
 
@@ -1573,11 +1571,11 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
 			enabled = NULL;
 	} else {
 		planeb_wm = fifo_size - wm_info->guard_size;
-		if (planeb_wm > (long)wm_info->max_wm)
+		if (planeb_wm > wm_info->max_wm)
 			planeb_wm = wm_info->max_wm;
 	}
 
-	DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
+	DRM_DEBUG_KMS("FIFO watermarks - A: %u, B: %u\n", planea_wm, planeb_wm);
 
 	if (IS_I915GM(dev) && enabled) {
 		struct drm_i915_gem_object *obj;
@@ -1653,8 +1651,8 @@ static void i845_update_wm(struct drm_crtc *unused_crtc)
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct drm_crtc *crtc;
 	const struct drm_display_mode *adjusted_mode;
-	uint32_t fwater_lo;
-	int planea_wm;
+	u32 fwater_lo;
+	unsigned int planea_wm;
 
 	crtc = single_enabled_crtc(dev);
 	if (crtc == NULL)
@@ -1668,7 +1666,7 @@ static void i845_update_wm(struct drm_crtc *unused_crtc)
 	fwater_lo = I915_READ(FW_BLC) & ~0xfff;
 	fwater_lo |= (3<<8) | planea_wm;
 
-	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm);
+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %u\n", planea_wm);
 
 	I915_WRITE(FW_BLC, fwater_lo);
 }
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2016-10-07 13:34 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-07 13:34 [PATCH 0/9] .rodata diet 2 (non-disruptive version) Tvrtko Ursulin
2016-10-07 13:34 ` [PATCH 1/9] drm/i915: Shrink cxsr_latency_table Tvrtko Ursulin
2016-10-10  7:15   ` Joonas Lahtinen
2016-10-07 13:34 ` [PATCH 2/9] drm/i915: Shrink sdvo_cmd_names Tvrtko Ursulin
2016-10-10  7:16   ` Joonas Lahtinen
2016-10-07 13:34 ` [PATCH 3/9] drm/i915: Shrink per-platform watermark configuration Tvrtko Ursulin
2016-10-10  7:17   ` Joonas Lahtinen
2016-10-07 13:34 ` [PATCH 4/9] drm/i915: Shrink TV modes const data Tvrtko Ursulin
2016-10-10  6:49   ` Jani Nikula
2016-10-10  8:38     ` Tvrtko Ursulin
2016-10-10  7:22   ` Joonas Lahtinen
2016-10-07 13:34 ` [PATCH 5/9] drm/i915: Use unsigned int for latencies Tvrtko Ursulin
2016-10-10  7:24   ` Joonas Lahtinen
2016-10-10  8:34     ` Tvrtko Ursulin
2016-10-07 13:34 ` [PATCH 6/9] drm/i915: unsigned int is enough for crtc clock Tvrtko Ursulin
2016-10-10  7:25   ` Joonas Lahtinen
2016-10-07 13:34 ` [PATCH 7/9] drm/i915: Convert get_fifo_size return from int to unsigned int Tvrtko Ursulin
2016-10-10  7:46   ` Joonas Lahtinen
2016-10-07 13:34 ` Tvrtko Ursulin [this message]
2016-10-10  8:02   ` [PATCH 8/9] drm/i915: Make intel_calculate_wm return " Joonas Lahtinen
2016-10-10  8:33     ` Tvrtko Ursulin
2016-10-07 13:34 ` [PATCH 9/9] drm/i915: Tidy watermark computation local types Tvrtko Ursulin
2016-10-07 13:48   ` Ville Syrjälä
2016-10-07 14:51     ` Tvrtko Ursulin
2016-10-07 15:16       ` Ville Syrjälä
2016-10-10  8:06         ` Joonas Lahtinen
2016-10-10  8:19 ` ✗ Fi.CI.BAT: warning for .rodata diet 2 (non-disruptive version) Patchwork
2016-10-10  8:27 ` ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1475847252-31580-9-git-send-email-tvrtko.ursulin@linux.intel.com \
    --to=tursulin@ursulin.net \
    --cc=Intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.