From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:37898 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753065AbcJNKCF (ORCPT ); Fri, 14 Oct 2016 06:02:05 -0400 Subject: Patch "x86/cpu: Rename Merrifield2 to Moorefield" has been added to the 4.8-stable tree To: andriy.shevchenko@linux.intel.com, dave.hansen@linux.intel.com, gregkh@linuxfoundation.org, mingo@kernel.org, peterz@infradead.org, tglx@linutronix.de, torvalds@linux-foundation.org Cc: , From: Date: Fri, 14 Oct 2016 12:01:14 +0200 Message-ID: <1476439274431@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled x86/cpu: Rename Merrifield2 to Moorefield to the 4.8-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: x86-cpu-rename-merrifield2-to-moorefield.patch and it can be found in the queue-4.8 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From f5fbf848303c8704d0e1a1e7cabd08fd0a49552f Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Sep 2016 21:42:54 +0300 Subject: x86/cpu: Rename Merrifield2 to Moorefield From: Andy Shevchenko commit f5fbf848303c8704d0e1a1e7cabd08fd0a49552f upstream. Merrifield2 is actually Moorefield. Rename it accordingly and drop tail digit from Merrifield1. Signed-off-by: Andy Shevchenko Cc: Dave Hansen Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/20160906184254.94440-1-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar Signed-off-by: Greg Kroah-Hartman --- arch/x86/include/asm/intel-family.h | 4 ++-- arch/x86/platform/atom/punit_atom_debug.c | 2 +- drivers/pci/pci-mid.c | 2 +- drivers/powercap/intel_rapl.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -56,8 +56,8 @@ #define INTEL_FAM6_ATOM_SILVERMONT1 0x37 /* BayTrail/BYT / Valleyview */ #define INTEL_FAM6_ATOM_SILVERMONT2 0x4D /* Avaton/Rangely */ #define INTEL_FAM6_ATOM_AIRMONT 0x4C /* CherryTrail / Braswell */ -#define INTEL_FAM6_ATOM_MERRIFIELD1 0x4A /* Tangier */ -#define INTEL_FAM6_ATOM_MERRIFIELD2 0x5A /* Annidale */ +#define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */ +#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Annidale */ #define INTEL_FAM6_ATOM_GOLDMONT 0x5C #define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */ --- a/arch/x86/platform/atom/punit_atom_debug.c +++ b/arch/x86/platform/atom/punit_atom_debug.c @@ -155,7 +155,7 @@ static void punit_dbgfs_unregister(void) static const struct x86_cpu_id intel_punit_cpu_ids[] = { ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt), - ICPU(INTEL_FAM6_ATOM_MERRIFIELD1, punit_device_tng), + ICPU(INTEL_FAM6_ATOM_MERRIFIELD, punit_device_tng), ICPU(INTEL_FAM6_ATOM_AIRMONT, punit_device_cht), {} }; --- a/drivers/pci/pci-mid.c +++ b/drivers/pci/pci-mid.c @@ -61,7 +61,7 @@ static struct pci_platform_pm_ops mid_pc #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } static const struct x86_cpu_id lpss_cpu_ids[] = { - ICPU(INTEL_FAM6_ATOM_MERRIFIELD1), + ICPU(INTEL_FAM6_ATOM_MERRIFIELD), {} }; --- a/drivers/powercap/intel_rapl.c +++ b/drivers/powercap/intel_rapl.c @@ -1154,8 +1154,8 @@ static const struct x86_cpu_id rapl_ids[ RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1, rapl_defaults_byt), RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT, rapl_defaults_cht), - RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1, rapl_defaults_tng), - RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2, rapl_defaults_ann), + RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD, rapl_defaults_tng), + RAPL_CPU(INTEL_FAM6_ATOM_MOOREFIELD, rapl_defaults_ann), RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT, rapl_defaults_core), RAPL_CPU(INTEL_FAM6_ATOM_DENVERTON, rapl_defaults_core), Patches currently in stable-queue which might be from andriy.shevchenko@linux.intel.com are queue-4.8/x86-platform-intel-mid-keep-sram-powered-on-at-boot.patch queue-4.8/x86-platform-intel-mid-add-intel-penwell-to-id-table.patch queue-4.8/x86-cpu-rename-merrifield2-to-moorefield.patch