From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 05/12] arm: socfpga: fpgamgr: Disable FPGA Manager for Stratix 10
Date: Mon, 17 Oct 2016 22:30:20 +0700 [thread overview]
Message-ID: <1476718220.4286.17.camel@altera.com> (raw)
In-Reply-To: <da62f6aa-9277-e6d5-a80f-82dd273ad3f5@denx.de>
On Sen, 2016-10-17 at 17:20 +0200, Marek Vasut wrote:
> On 10/17/2016 05:14 PM, Chin Liang See wrote:
> >
> > On Sen, 2016-10-17 at 15:42 +0200, Marek Vasut wrote:
> > >
> > > On 10/17/2016 03:35 PM, See, Chin Liang wrote:
> > > >
> > > >
> > > > On Min, 2016-10-16 at 17:34 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 10/13/2016 10:33 AM, Chin Liang See wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > Disable the FPGA Manager for Stratix 10 SoC as we are not
> > > > > > using this for SOCVP
> > > > > If it's not used on SoCVP, then shouldn't this be disabled
> > > > > only
> > > > > for
> > > > > SoCVP instead of S10 ?
> > > > >
> > > > We will be enhancing this code to support the hardware /
> > > > emulation
> > > > in
> > > > later phase. In another word, will switch the support from
> > > > SOCVP to
> > > > hardware once its available.
> > > >
> > > This is confusing, what would happen if someone tries to use old
> > > u-
> > > boot
> > > on real hardware ?
> > It won't work until added drivers for Clocks, Reset and DDR.
> > Current
> > state would be good for SOCVP only where not all hardware is
> > simulated.
> In that case, mark it as SoCVP to prevent confusion please.
>
In this case, I can update the config to indicate this is S10 SOCVP.
Thanks
Chin Liang
>
> --
> Best regards,
> Marek Vasut
>
> ________________________________
>
> Confidentiality Notice.
> This message may contain information that is confidential or
> otherwise protected from disclosure. If you are not the intended
> recipient, you are hereby notified that any use, disclosure,
> dissemination, distribution, or copying of this message, or any
> attachments, is strictly prohibited. If you have received this
> message in error, please advise the sender by reply e-mail, and
> delete the message and any attachments. Thank you.
next prev parent reply other threads:[~2016-10-17 15:30 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-13 8:32 [U-Boot] [PATCH v3 00/12] Add support for Stratix 10 SoC Chin Liang See
2016-10-13 8:32 ` [U-Boot] [PATCH v3 01/12] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address Chin Liang See
2016-10-16 15:31 ` Marek Vasut
2016-10-17 13:26 ` See, Chin Liang
2016-10-17 13:40 ` Marek Vasut
2016-10-17 15:02 ` Chin Liang See
2016-10-13 8:32 ` [U-Boot] [PATCH v3 02/12] arm: socfpga: rstmgr: Add Reset Manager for Stratix 10 Chin Liang See
2016-10-13 8:33 ` [U-Boot] [PATCH v3 03/12] arm: socfpga: rstmgr: Separate the " Chin Liang See
2016-10-13 8:33 ` [U-Boot] [PATCH v3 04/12] arm: socfpga: clkmgr: Separate the Clock " Chin Liang See
2016-10-16 15:33 ` Marek Vasut
2016-10-17 13:32 ` See, Chin Liang
2016-10-17 13:42 ` Marek Vasut
2016-10-17 15:07 ` Chin Liang See
2016-10-17 15:20 ` Marek Vasut
2016-10-17 15:28 ` Chin Liang See
2016-10-17 15:39 ` Marek Vasut
2016-10-17 15:59 ` Chin Liang See
2016-10-17 16:14 ` Marek Vasut
2016-10-18 3:22 ` Chin Liang See
2016-10-18 4:00 ` Marek Vasut
2016-10-18 3:34 ` Chin Liang See
2016-10-18 11:45 ` Marek Vasut
2016-10-13 8:33 ` [U-Boot] [PATCH v3 05/12] arm: socfpga: fpgamgr: Disable FPGA " Chin Liang See
2016-10-16 15:34 ` Marek Vasut
2016-10-17 13:35 ` See, Chin Liang
2016-10-17 13:42 ` Marek Vasut
2016-10-17 15:14 ` Chin Liang See
2016-10-17 15:20 ` Marek Vasut
2016-10-17 15:30 ` Chin Liang See [this message]
2016-10-17 15:39 ` Marek Vasut
2016-10-13 8:33 ` [U-Boot] [PATCH v3 06/12] arm: socfpga: misc: Separate the misc.c " Chin Liang See
2016-10-13 8:33 ` [U-Boot] [PATCH v3 07/12] arm: socfpga: sysmgr: Disable System Manager " Chin Liang See
2016-10-16 15:38 ` Marek Vasut
2016-10-17 15:21 ` Chin Liang See
2016-10-13 8:33 ` [U-Boot] [PATCH v3 08/12] arm: socfpga: mmu: Add memory map layout for Stratix 10 SoC Chin Liang See
2016-10-13 8:33 ` [U-Boot] [PATCH v3 09/12] arm: socfpga: stratix10: Add board directory for Stratix 10 socdk Chin Liang See
2016-10-16 15:39 ` Marek Vasut
2016-10-17 15:32 ` Chin Liang See
2016-10-17 15:40 ` Marek Vasut
2016-10-13 8:33 ` [U-Boot] [PATCH v3 10/12] arm: dts: socfpga: Add dts " Chin Liang See
2016-10-13 8:33 ` [U-Boot] [PATCH v3 11/12] arm: socfpga: Add SPL support for Stratix 10 SoC Chin Liang See
2016-10-16 15:41 ` Marek Vasut
2016-10-17 15:34 ` Chin Liang See
2016-10-17 15:40 ` Marek Vasut
2016-10-13 8:33 ` [U-Boot] [PATCH v3 12/12] arm: socfpga: Add support for Stratix 10 SoC dev kit Chin Liang See
2016-10-16 15:49 ` Marek Vasut
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1476718220.4286.17.camel@altera.com \
--to=clsee@altera.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.