From: riel@redhat.com
To: linux-kernel@vger.kernel.org
Cc: mingo@kernel.org, bp@alien8.de, torvalds@linux-foundation.org,
luto@kernel.org, dave.hansen@intel.linux.com, tglx@linutronix.de,
hpa@zytor.com
Subject: [PATCH RFC 1/3] fpu/x86: add make_fpregs_active(_newstate) helper functions
Date: Mon, 17 Oct 2016 16:09:42 -0400 [thread overview]
Message-ID: <1476734984-13839-2-git-send-email-riel@redhat.com> (raw)
In-Reply-To: <1476734984-13839-1-git-send-email-riel@redhat.com>
From: Rik van Riel <riel@redhat.com>
Add helper functions that ensure a task's floating point registers are
set up the way they need to be - either with the task's floating point
state loaded in, or ready to accept a task's new floating point state.
These helpers can be called from code that accesses the floating point
state from a preemptible state, in preparation for the lazier floating
point loading code, using loops like this:
do {
make_fpregs_active();
...
} while (unlikely(!fpregs_active()));
This way a task can safely do things like saving the floating point
state of a task to user space memory (the signal handling code does
this), without requiring that the floating point state is restored
at every context switch.
If the floating point registers are still active when leaving the
loop, the floating point state has ended up in its destination
(registers or memory) in one piece, and will be saved at the next
context switch.
When the floating point state is already present, these functions
do nothing.
Signed-off-by: Rik van Riel <riel@redhat.com>
---
arch/x86/include/asm/fpu/internal.h | 53 +++++++++++++++++++++++++++++++++----
1 file changed, 48 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 621ba3bfa2a7..d40deb337807 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -473,6 +473,14 @@ static inline void copy_kernel_to_fpregs(union fpregs_state *fpstate)
extern int copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
/*
+ * Is this thread using floating point state.
+ */
+static inline int fpstate_active(void)
+{
+ return current->thread.fpu.fpstate_active;
+}
+
+/*
* FPU context switch related helper methods:
*/
@@ -548,6 +556,44 @@ static inline int fpregs_active(void)
}
/*
+ * Ensure the floating point registers are ready for this task, and
+ * contain the task's floating point state.
+ *
+ * The loadnew variant can be used when loading new floating point
+ * state, and the old floating point register state does not matter.
+ */
+static inline void __make_fpregs_active(struct fpu *fpu, int cpu)
+{
+ if (!fpregs_state_valid(fpu, cpu))
+ copy_kernel_to_fpregs(&fpu->state);
+ fpregs_activate(fpu);
+}
+
+static inline void make_fpregs_active(void)
+{
+ struct fpu *fpu = ¤t->thread.fpu;
+
+ if (fpregs_active())
+ return;
+
+ preempt_disable();
+ __make_fpregs_active(fpu, raw_smp_processor_id());
+ preempt_enable();
+}
+
+static inline void make_fpregs_active_loadnew(void)
+{
+ struct fpu *fpu = ¤t->thread.fpu;
+
+ if (fpregs_active())
+ return;
+
+ preempt_disable();
+ fpregs_activate(fpu);
+ preempt_enable();
+}
+
+/*
* FPU state switching for scheduling.
*
* This is a two-stage process:
@@ -587,11 +633,8 @@ static inline void switch_fpu_finish(struct fpu *new_fpu, int cpu)
bool preload = static_cpu_has(X86_FEATURE_FPU) &&
new_fpu->fpstate_active;
- if (preload) {
- if (!fpregs_state_valid(new_fpu, cpu))
- copy_kernel_to_fpregs(&new_fpu->state);
- fpregs_activate(new_fpu);
- }
+ if (preload)
+ __make_fpregs_active(new_fpu, cpu);
}
/*
--
2.7.4
next prev parent reply other threads:[~2016-10-17 20:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-17 20:09 [PATCH RFC 0/3] x86/fpu: defer FPU state loading until return to userspace riel
2016-10-17 20:09 ` riel [this message]
2016-10-17 20:57 ` [PATCH RFC 1/3] fpu/x86: add make_fpregs_active(_newstate) helper functions Andy Lutomirski
2016-10-17 23:04 ` Yu-cheng Yu
2016-10-17 23:30 ` Andy Lutomirski
2016-10-17 23:45 ` Yu-cheng Yu
2016-10-18 1:23 ` Andy Lutomirski
2016-10-17 20:09 ` [PATCH RFC 2/3] x86/fpu: prepare misc FPU state handling code for lazy FPU loading riel
2016-10-17 20:09 ` [PATCH RFC 3/3] x86/fpu: defer FPU state load until return to userspace riel
2016-10-17 20:58 ` Andy Lutomirski
2016-10-18 0:06 ` Rik van Riel
2016-10-18 7:58 ` [PATCH RFC 0/3] x86/fpu: defer FPU state loading " Ingo Molnar
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