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diff for duplicates of <1477039751.15560.88.camel@baylibre.com>

diff --git a/a/1.txt b/N1/1.txt
index 9417a2a..20e3682 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -17,29 +17,29 @@ On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:
 > > 
 > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
 > > ---
-> > ?drivers/irqchip/Kconfig??????????|???9 +
-> > ?drivers/irqchip/Makefile?????????|???1 +
-> > ?drivers/irqchip/irq-meson-gpio.c | 423
+> >  drivers/irqchip/Kconfig          |   9 +
+> >  drivers/irqchip/Makefile         |   1 +
+> >  drivers/irqchip/irq-meson-gpio.c | 423
 > > +++++++++++++++++++++++++++++++++++++++
-> > ?3 files changed, 433 insertions(+)
-> > ?create mode 100644 drivers/irqchip/irq-meson-gpio.c
+> >  3 files changed, 433 insertions(+)
+> >  create mode 100644 drivers/irqchip/irq-meson-gpio.c
 > > 
 > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
 > > index 82b0b5daf3f5..168837263e80 100644
 > > --- a/drivers/irqchip/Kconfig
 > > +++ b/drivers/irqchip/Kconfig
 > > @@ -279,3 +279,12 @@ config EZNPS_GIC
-> > ?config STM32_EXTI
-> > ?	bool
-> > ?	select IRQ_DOMAIN
+> >  config STM32_EXTI
+> >  	bool
+> >  	select IRQ_DOMAIN
 > > +
 > > +config MESON_GPIO_IRQ
-> > +???????bool "Meson GPIO Interrupt Multiplexer"
-> > +???????depends on ARCH_MESON || COMPILE_TEST
-> > +???????select IRQ_DOMAIN
-> > +???????select IRQ_DOMAIN_HIERARCHY
-> > +???????help
-> > +?????????Support Meson SoC Family GPIO Interrupt Multiplexer
+> > +       bool "Meson GPIO Interrupt Multiplexer"
+> > +       depends on ARCH_MESON || COMPILE_TEST
+> > +       select IRQ_DOMAIN
+> > +       select IRQ_DOMAIN_HIERARCHY
+> > +       help
+> > +         Support Meson SoC Family GPIO Interrupt Multiplexer
 > > +
 > > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
 > > index e4dbfc85abdb..33f913d037d0 100644
@@ -47,9 +47,9 @@ On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:
 > > +++ b/drivers/irqchip/Makefile
 > > @@ -74,3 +74,4 @@ obj-$(CONFIG_LS_SCFG_MSI)		+= irq-
 > > ls-scfg-msi.o
-> > ?obj-$(CONFIG_EZNPS_GIC)			+= irq-eznps.o
-> > ?obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o
-> > ?obj-$(CONFIG_STM32_EXTI)?		+= irq-stm32-exti.o
+> >  obj-$(CONFIG_EZNPS_GIC)			+= irq-eznps.o
+> >  obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o
+> >  obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
 > > +obj-$(CONFIG_MESON_GPIO_IRQ)		+= irq-meson-gpio.o
 > > diff --git a/drivers/irqchip/irq-meson-gpio.c
 > > b/drivers/irqchip/irq-meson-gpio.c
@@ -73,7 +73,7 @@ On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:
 > > + * This program is distributed in the hope that it will be useful,
 > > but
 > > + * WITHOUT ANY WARRANTY; without even the implied warranty of
-> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the
+> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 > > GNU
 > > + * General Public License for more details.
 > > + *
@@ -204,8 +204,8 @@ was the case someday, I guess having two compatibles would do the trick
 > > 
 > > +
 > > +static const struct meson_gpio_irq_params meson8_params = {
-> > +	.nhwirq??= 134,
-> > +	.source??= meson_parent_hwirqs,
+> > +	.nhwirq  = 134,
+> > +	.source  = meson_parent_hwirqs,
 > > +	.nsource = ARRAY_SIZE(meson_parent_hwirqs),
 > 
 > I find it utterly confusing that you are calling source something
@@ -224,14 +224,14 @@ Ohhhh !! it's Halloween season and you don't need a costume anymore ;)
 > > +};
 > > +
 > > +static const struct meson_gpio_irq_params meson8b_params = {
-> > +	.nhwirq??= 119,
-> > +	.source??= meson_parent_hwirqs,
+> > +	.nhwirq  = 119,
+> > +	.source  = meson_parent_hwirqs,
 > > +	.nsource = ARRAY_SIZE(meson_parent_hwirqs),
 > > +};
 > > +
 > > +static const struct meson_gpio_irq_params meson_gxbb_params = {
-> > +	.nhwirq??= 133,
-> > +	.source??= meson_parent_hwirqs,
+> > +	.nhwirq  = 133,
+> > +	.source  = meson_parent_hwirqs,
 > > +	.nsource = ARRAY_SIZE(meson_parent_hwirqs),
 > > +};
 > 
@@ -284,7 +284,7 @@ number of pad routed to it is changing with every SoC version.
 > > +
 > > +static void meson_gpio_irq_update_bits(void __iomem *base,
 > > unsigned int reg,
-> > +				???????u32 mask, u32 val)
+> > +				       u32 mask, u32 val)
 > > +{
 > > +	u32 tmp;
 > > +
@@ -304,7 +304,7 @@ Indeed, this will be fixed.
 > > +
 > > +static int meson_gpio_irq_get_index(struct meson_gpio_irq_domain
 > > *domain_data,
-> > +				????int hwirq)
+> > +				    int hwirq)
 > > +{
 > > +	int i;
 > > +
@@ -331,8 +331,8 @@ OK
 > > +
 > > +static int mesion_gpio_irq_map_source(struct meson_gpio_irq_domain
 > > *domain_data,
-> > +				??????irq_hw_number_t hwirq,
-> > +				??????irq_hw_number_t *source)
+> > +				      irq_hw_number_t hwirq,
+> > +				      irq_hw_number_t *source)
 > > +{
 > > +	int index;
 > > +	unsigned int reg;
@@ -357,23 +357,23 @@ OK
 > > +
 > > +	reg = (index < 4) ? REG_PIN_03_SEL : REG_PIN_47_SEL;
 > > +	meson_gpio_irq_update_bits(domain_data->base, reg,
-> > +				???0xff <<
+> > +				   0xff <<
 > > REG_PIN_SEL_SHIFT(index),
-> > +				???hwirq <<
+> > +				   hwirq <<
 > > REG_PIN_SEL_SHIFT(index));
 > > +
 > > +	*source = domain_data->params->source[index];
 > > +
 > > +	pr_debug("hwirq %lu assigned to channel %d - source
 > > %lu\n",
-> > +		?hwirq, index, *source);
+> > +		 hwirq, index, *source);
 > > +
 > > +	return index;
 > > +}
 > > +
 > > +static int meson_gpio_irq_type_setup(unsigned int type, void
 > > __iomem *base,
-> > +				?????int index)
+> > +				     int index)
 > > +{
 > > +	u32 val = 0;
 > > +
@@ -389,7 +389,7 @@ OK
 > > +		val |= REG_EDGE_POL_LOW(index);
 > > +
 > > +	meson_gpio_irq_update_bits(base, REG_EDGE_POL,
-> > +				???REG_EDGE_POL_MASK(index), val);
+> > +				   REG_EDGE_POL_MASK(index), val);
 > > +
 > > +	return 0;
 > > +}
@@ -401,10 +401,10 @@ OK
 > > +	type &= ~IRQ_TYPE_SENSE_MASK;
 > > +
 > > +	/*
-> > +	?* If the polarity of interrupt is low, the controller
+> > +	 * If the polarity of interrupt is low, the controller
 > > will
-> > +	?* invert the signal for gic
-> > +	?*/
+> > +	 * invert the signal for gic
+> > +	 */
 > > +	if (sense & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
 > > +		type |= IRQ_TYPE_LEVEL_HIGH;
 > > +	else if (sense & (IRQ_TYPE_EDGE_RISING |
@@ -449,10 +449,10 @@ OK
 > > +
 > > +static int meson_gpio_irq_domain_translate(struct irq_domain
 > > *domain,
-> > +					???struct irq_fwspec
+> > +					   struct irq_fwspec
 > > *fwspec,
-> > +					???unsigned long *hwirq,
-> > +					???unsigned int *type)
+> > +					   unsigned long *hwirq,
+> > +					   unsigned int *type)
 > > +{
 > > +	if (is_of_node(fwspec->fwnode)) {
 > > +		if (fwspec->param_count != 2)
@@ -478,9 +478,9 @@ OK
 > > +
 > > +static int meson_gpio_irq_allocate_gic_irq(struct irq_domain
 > > *domain,
-> > +					???unsigned int virq,
-> > +					???irq_hw_number_t source,
-> > +					???unsigned int type)
+> > +					   unsigned int virq,
+> > +					   irq_hw_number_t source,
+> > +					   unsigned int type)
 > > +{
 > > +	struct irq_fwspec fwspec;
 > > +
@@ -505,9 +505,9 @@ You can't, will be removed
 > > +}
 > > +
 > > +static int meson_gpio_irq_domain_alloc(struct irq_domain *domain,
-> > +				???????unsigned int virq,
-> > +				???????unsigned int nr_irqs,
-> > +				???????void *data)
+> > +				       unsigned int virq,
+> > +				       unsigned int nr_irqs,
+> > +				       void *data)
 > > +{
 > > +	struct irq_fwspec *fwspec = data;
 > > +	struct meson_gpio_irq_domain *domain_data = domain-
@@ -556,7 +556,7 @@ I'm perfectly happy using your solution, it makes more sense.
 > > 
 > > +		index = mesion_gpio_irq_map_source(domain_data,
 > > hwirq + i,
-> > +						???&source);
+> > +						   &source);
 > > +		if (index < 0)
 > > +			return index;
 > > +
@@ -592,7 +592,7 @@ OK
 > &meson_parent_hwirqs[index];
 
 meson_parent_hwirq is only declared this way to avoid writing the
-parent irqs 3 times (in each SoC params).?
+parent irqs 3 times (in each SoC params). 
 Using it this way would make it global and imply it is the same
 whatever the SoC. This something I can't guarantee and I would prefer
 to avoid that.
@@ -602,13 +602,13 @@ to avoid that.
 > > +
 > > +		irq_domain_set_hwirq_and_chip(domain, virq + i,
 > > hwirq + i,
-> > +					??????&meson_gpio_irq_chip
+> > +					      &meson_gpio_irq_chip
 > > , cd);
 > 
 > and this written as
 > 
 > 		irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
-> 					??????out_line);
+> 					      out_line);
 > 
 > In your set_type function, you just compute the index back:
 > 
@@ -625,7 +625,7 @@ I'll rework this to get rid of this structure.
 > > +
 > > +		ret = meson_gpio_irq_allocate_gic_irq(domain, virq
 > > + i,
-> > +						??????source,
+> > +						      source,
 > > type);
 > 
 > Resource leak on error.
@@ -642,8 +642,8 @@ Ok, Thx.
 > > +}
 > > +
 > > +static void meson_gpio_irq_domain_free(struct irq_domain *domain,
-> > +				???????unsigned int virq,
-> > +				???????unsigned int nr_irqs)
+> > +				       unsigned int virq,
+> > +				       unsigned int nr_irqs)
 > > +{
 > > +	struct meson_gpio_irq_domain *domain_data = domain-
 > > >host_data;
@@ -679,9 +679,9 @@ OK
 > > +
 > > +static int __init
 > > +meson_gpio_irq_init_domain(struct device_node *node,
-> > +			???struct meson_gpio_irq_domain
+> > +			   struct meson_gpio_irq_domain
 > > *domain_data,
-> > +			???const struct meson_gpio_irq_params
+> > +			   const struct meson_gpio_irq_params
 > > *params)
 > > +{
 > > +	int i;
@@ -706,7 +706,7 @@ OK
 > > +}
 > > +
 > > +static int __init meson_gpio_irq_of_init(struct device_node *node,
-> > +					?struct device_node
+> > +					 struct device_node
 > > *parent)
 > > +{
 > > +	struct irq_domain *domain, *parent_domain;
@@ -748,9 +748,9 @@ OK
 > > +
 > > +	domain = irq_domain_add_hierarchy(parent_domain, 0,
 > > params->nhwirq,
-> > +					??node,
+> > +					  node,
 > > &meson_gpio_irq_domain_ops,
-> > +					??domain_data);
+> > +					  domain_data);
 > 
 > Please be consistent in using the fwnode API instead of the of_node
 > one.
diff --git a/a/content_digest b/N1/content_digest
index 486ab82..167e2de 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,10 +1,25 @@
  "ref\01476890480-8884-1-git-send-email-jbrunet@baylibre.com\0"
  "ref\01476890480-8884-2-git-send-email-jbrunet@baylibre.com\0"
  "ref\0ec297647-1ab7-7e6b-5945-be8360f92421@arm.com\0"
- "From\0jbrunet@baylibre.com (Jerome Brunet)\0"
- "Subject\0[PATCH v2 1/9] irqchip: meson: add support for gpio interrupt controller\0"
+ "From\0Jerome Brunet <jbrunet@baylibre.com>\0"
+ "Subject\0Re: [PATCH v2 1/9] irqchip: meson: add support for gpio interrupt controller\0"
  "Date\0Fri, 21 Oct 2016 10:49:11 +0200\0"
- "To\0linus-amlogic@lists.infradead.org\0"
+ "To\0Marc Zyngier <marc.zyngier@arm.com>"
+  Carlo Caione <carlo@caione.org>
+  Kevin Hilman <khilman@baylibre.com>
+  Thomas Gleixner <tglx@linutronix.de>
+ " Jason Cooper <jason@lakedaemon.net>\0"
+ "Cc\0linux-amlogic@lists.infradead.org"
+  linux-arm-kernel@lists.infradead.org
+  linux-gpio@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  devicetree@vger.kernel.org
+  Rob Herring <robh+dt@kernel.org>
+  Linus Walleij <linus.walleij@linaro.org>
+  Catalin Marinas <catalin.marinas@arm.com>
+  Will Deacon <will.deacon@arm.com>
+  Russell King <linux@armlinux.org.uk>
+ " Mark Rutland <Mark.Rutland@arm.com>\0"
  "\00:1\0"
  "b\0"
  "On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:\n"
@@ -26,29 +41,29 @@
  "> > \n"
  "> > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>\n"
  "> > ---\n"
- "> > ?drivers/irqchip/Kconfig??????????|???9 +\n"
- "> > ?drivers/irqchip/Makefile?????????|???1 +\n"
- "> > ?drivers/irqchip/irq-meson-gpio.c | 423\n"
+ "> > \302\240drivers/irqchip/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\2409 +\n"
+ "> > \302\240drivers/irqchip/Makefile\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\2401 +\n"
+ "> > \302\240drivers/irqchip/irq-meson-gpio.c | 423\n"
  "> > +++++++++++++++++++++++++++++++++++++++\n"
- "> > ?3 files changed, 433 insertions(+)\n"
- "> > ?create mode 100644 drivers/irqchip/irq-meson-gpio.c\n"
+ "> > \302\2403 files changed, 433 insertions(+)\n"
+ "> > \302\240create mode 100644 drivers/irqchip/irq-meson-gpio.c\n"
  "> > \n"
  "> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig\n"
  "> > index 82b0b5daf3f5..168837263e80 100644\n"
  "> > --- a/drivers/irqchip/Kconfig\n"
  "> > +++ b/drivers/irqchip/Kconfig\n"
  "> > @@ -279,3 +279,12 @@ config EZNPS_GIC\n"
- "> > ?config STM32_EXTI\n"
- "> > ?\tbool\n"
- "> > ?\tselect IRQ_DOMAIN\n"
+ "> > \302\240config STM32_EXTI\n"
+ "> > \302\240\tbool\n"
+ "> > \302\240\tselect IRQ_DOMAIN\n"
  "> > +\n"
  "> > +config MESON_GPIO_IRQ\n"
- "> > +???????bool \"Meson GPIO Interrupt Multiplexer\"\n"
- "> > +???????depends on ARCH_MESON || COMPILE_TEST\n"
- "> > +???????select IRQ_DOMAIN\n"
- "> > +???????select IRQ_DOMAIN_HIERARCHY\n"
- "> > +???????help\n"
- "> > +?????????Support Meson SoC Family GPIO Interrupt Multiplexer\n"
+ "> > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240bool \"Meson GPIO Interrupt Multiplexer\"\n"
+ "> > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240depends on ARCH_MESON || COMPILE_TEST\n"
+ "> > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240select IRQ_DOMAIN\n"
+ "> > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240select IRQ_DOMAIN_HIERARCHY\n"
+ "> > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240help\n"
+ "> > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240Support Meson SoC Family GPIO Interrupt Multiplexer\n"
  "> > +\n"
  "> > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile\n"
  "> > index e4dbfc85abdb..33f913d037d0 100644\n"
@@ -56,9 +71,9 @@
  "> > +++ b/drivers/irqchip/Makefile\n"
  "> > @@ -74,3 +74,4 @@ obj-$(CONFIG_LS_SCFG_MSI)\t\t+= irq-\n"
  "> > ls-scfg-msi.o\n"
- "> > ?obj-$(CONFIG_EZNPS_GIC)\t\t\t+= irq-eznps.o\n"
- "> > ?obj-$(CONFIG_ARCH_ASPEED)\t\t+= irq-aspeed-vic.o\n"
- "> > ?obj-$(CONFIG_STM32_EXTI)?\t\t+= irq-stm32-exti.o\n"
+ "> > \302\240obj-$(CONFIG_EZNPS_GIC)\t\t\t+= irq-eznps.o\n"
+ "> > \302\240obj-$(CONFIG_ARCH_ASPEED)\t\t+= irq-aspeed-vic.o\n"
+ "> > \302\240obj-$(CONFIG_STM32_EXTI)\302\240\t\t+= irq-stm32-exti.o\n"
  "> > +obj-$(CONFIG_MESON_GPIO_IRQ)\t\t+= irq-meson-gpio.o\n"
  "> > diff --git a/drivers/irqchip/irq-meson-gpio.c\n"
  "> > b/drivers/irqchip/irq-meson-gpio.c\n"
@@ -82,7 +97,7 @@
  "> > + * This program is distributed in the hope that it will be useful,\n"
  "> > but\n"
  "> > + * WITHOUT ANY WARRANTY; without even the implied warranty of\n"
- "> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the\n"
+ "> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\302\240\302\240See the\n"
  "> > GNU\n"
  "> > + * General Public License for more details.\n"
  "> > + *\n"
@@ -213,8 +228,8 @@
  "> > \n"
  "> > +\n"
  "> > +static const struct meson_gpio_irq_params meson8_params = {\n"
- "> > +\t.nhwirq??= 134,\n"
- "> > +\t.source??= meson_parent_hwirqs,\n"
+ "> > +\t.nhwirq\302\240\302\240= 134,\n"
+ "> > +\t.source\302\240\302\240= meson_parent_hwirqs,\n"
  "> > +\t.nsource = ARRAY_SIZE(meson_parent_hwirqs),\n"
  "> \n"
  "> I find it utterly confusing that you are calling source something\n"
@@ -233,14 +248,14 @@
  "> > +};\n"
  "> > +\n"
  "> > +static const struct meson_gpio_irq_params meson8b_params = {\n"
- "> > +\t.nhwirq??= 119,\n"
- "> > +\t.source??= meson_parent_hwirqs,\n"
+ "> > +\t.nhwirq\302\240\302\240= 119,\n"
+ "> > +\t.source\302\240\302\240= meson_parent_hwirqs,\n"
  "> > +\t.nsource = ARRAY_SIZE(meson_parent_hwirqs),\n"
  "> > +};\n"
  "> > +\n"
  "> > +static const struct meson_gpio_irq_params meson_gxbb_params = {\n"
- "> > +\t.nhwirq??= 133,\n"
- "> > +\t.source??= meson_parent_hwirqs,\n"
+ "> > +\t.nhwirq\302\240\302\240= 133,\n"
+ "> > +\t.source\302\240\302\240= meson_parent_hwirqs,\n"
  "> > +\t.nsource = ARRAY_SIZE(meson_parent_hwirqs),\n"
  "> > +};\n"
  "> \n"
@@ -293,7 +308,7 @@
  "> > +\n"
  "> > +static void meson_gpio_irq_update_bits(void __iomem *base,\n"
  "> > unsigned int reg,\n"
- "> > +\t\t\t\t???????u32 mask, u32 val)\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240u32 mask, u32 val)\n"
  "> > +{\n"
  "> > +\tu32 tmp;\n"
  "> > +\n"
@@ -313,7 +328,7 @@
  "> > +\n"
  "> > +static int meson_gpio_irq_get_index(struct meson_gpio_irq_domain\n"
  "> > *domain_data,\n"
- "> > +\t\t\t\t????int hwirq)\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240int hwirq)\n"
  "> > +{\n"
  "> > +\tint i;\n"
  "> > +\n"
@@ -340,8 +355,8 @@
  "> > +\n"
  "> > +static int mesion_gpio_irq_map_source(struct meson_gpio_irq_domain\n"
  "> > *domain_data,\n"
- "> > +\t\t\t\t??????irq_hw_number_t hwirq,\n"
- "> > +\t\t\t\t??????irq_hw_number_t *source)\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240irq_hw_number_t hwirq,\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240irq_hw_number_t *source)\n"
  "> > +{\n"
  "> > +\tint index;\n"
  "> > +\tunsigned int reg;\n"
@@ -366,23 +381,23 @@
  "> > +\n"
  "> > +\treg = (index < 4) ? REG_PIN_03_SEL : REG_PIN_47_SEL;\n"
  "> > +\tmeson_gpio_irq_update_bits(domain_data->base, reg,\n"
- "> > +\t\t\t\t???0xff <<\n"
+ "> > +\t\t\t\t\302\240\302\240\302\2400xff <<\n"
  "> > REG_PIN_SEL_SHIFT(index),\n"
- "> > +\t\t\t\t???hwirq <<\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240hwirq <<\n"
  "> > REG_PIN_SEL_SHIFT(index));\n"
  "> > +\n"
  "> > +\t*source = domain_data->params->source[index];\n"
  "> > +\n"
  "> > +\tpr_debug(\"hwirq %lu assigned to channel %d - source\n"
  "> > %lu\\n\",\n"
- "> > +\t\t?hwirq, index, *source);\n"
+ "> > +\t\t\302\240hwirq, index, *source);\n"
  "> > +\n"
  "> > +\treturn index;\n"
  "> > +}\n"
  "> > +\n"
  "> > +static int meson_gpio_irq_type_setup(unsigned int type, void\n"
  "> > __iomem *base,\n"
- "> > +\t\t\t\t?????int index)\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240int index)\n"
  "> > +{\n"
  "> > +\tu32 val = 0;\n"
  "> > +\n"
@@ -398,7 +413,7 @@
  "> > +\t\tval |= REG_EDGE_POL_LOW(index);\n"
  "> > +\n"
  "> > +\tmeson_gpio_irq_update_bits(base, REG_EDGE_POL,\n"
- "> > +\t\t\t\t???REG_EDGE_POL_MASK(index), val);\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240REG_EDGE_POL_MASK(index), val);\n"
  "> > +\n"
  "> > +\treturn 0;\n"
  "> > +}\n"
@@ -410,10 +425,10 @@
  "> > +\ttype &= ~IRQ_TYPE_SENSE_MASK;\n"
  "> > +\n"
  "> > +\t/*\n"
- "> > +\t?* If the polarity of interrupt is low, the controller\n"
+ "> > +\t\302\240* If the polarity of interrupt is low, the controller\n"
  "> > will\n"
- "> > +\t?* invert the signal for gic\n"
- "> > +\t?*/\n"
+ "> > +\t\302\240* invert the signal for gic\n"
+ "> > +\t\302\240*/\n"
  "> > +\tif (sense & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))\n"
  "> > +\t\ttype |= IRQ_TYPE_LEVEL_HIGH;\n"
  "> > +\telse if (sense & (IRQ_TYPE_EDGE_RISING |\n"
@@ -458,10 +473,10 @@
  "> > +\n"
  "> > +static int meson_gpio_irq_domain_translate(struct irq_domain\n"
  "> > *domain,\n"
- "> > +\t\t\t\t\t???struct irq_fwspec\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240struct irq_fwspec\n"
  "> > *fwspec,\n"
- "> > +\t\t\t\t\t???unsigned long *hwirq,\n"
- "> > +\t\t\t\t\t???unsigned int *type)\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240unsigned long *hwirq,\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240unsigned int *type)\n"
  "> > +{\n"
  "> > +\tif (is_of_node(fwspec->fwnode)) {\n"
  "> > +\t\tif (fwspec->param_count != 2)\n"
@@ -487,9 +502,9 @@
  "> > +\n"
  "> > +static int meson_gpio_irq_allocate_gic_irq(struct irq_domain\n"
  "> > *domain,\n"
- "> > +\t\t\t\t\t???unsigned int virq,\n"
- "> > +\t\t\t\t\t???irq_hw_number_t source,\n"
- "> > +\t\t\t\t\t???unsigned int type)\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240unsigned int virq,\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240irq_hw_number_t source,\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240unsigned int type)\n"
  "> > +{\n"
  "> > +\tstruct irq_fwspec fwspec;\n"
  "> > +\n"
@@ -514,9 +529,9 @@
  "> > +}\n"
  "> > +\n"
  "> > +static int meson_gpio_irq_domain_alloc(struct irq_domain *domain,\n"
- "> > +\t\t\t\t???????unsigned int virq,\n"
- "> > +\t\t\t\t???????unsigned int nr_irqs,\n"
- "> > +\t\t\t\t???????void *data)\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240unsigned int virq,\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240unsigned int nr_irqs,\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240void *data)\n"
  "> > +{\n"
  "> > +\tstruct irq_fwspec *fwspec = data;\n"
  "> > +\tstruct meson_gpio_irq_domain *domain_data = domain-\n"
@@ -565,7 +580,7 @@
  "> > \n"
  "> > +\t\tindex = mesion_gpio_irq_map_source(domain_data,\n"
  "> > hwirq + i,\n"
- "> > +\t\t\t\t\t\t???&source);\n"
+ "> > +\t\t\t\t\t\t\302\240\302\240\302\240&source);\n"
  "> > +\t\tif (index < 0)\n"
  "> > +\t\t\treturn index;\n"
  "> > +\n"
@@ -601,7 +616,7 @@
  "> &meson_parent_hwirqs[index];\n"
  "\n"
  "meson_parent_hwirq is only declared this way to avoid writing the\n"
- "parent irqs 3 times (in each SoC params).?\n"
+ "parent irqs 3 times (in each SoC params).\302\240\n"
  "Using it this way would make it global and imply it is the same\n"
  "whatever the SoC. This something I can't guarantee and I would prefer\n"
  "to avoid that.\n"
@@ -611,13 +626,13 @@
  "> > +\n"
  "> > +\t\tirq_domain_set_hwirq_and_chip(domain, virq + i,\n"
  "> > hwirq + i,\n"
- "> > +\t\t\t\t\t??????&meson_gpio_irq_chip\n"
+ "> > +\t\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240&meson_gpio_irq_chip\n"
  "> > , cd);\n"
  "> \n"
  "> and this written as\n"
  "> \n"
  "> \t\tirq_domain_set_hwirq_and_chip(domain, virq, hwirq,\n"
- "> \t\t\t\t\t??????out_line);\n"
+ "> \t\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240out_line);\n"
  "> \n"
  "> In your set_type function, you just compute the index back:\n"
  "> \n"
@@ -634,7 +649,7 @@
  "> > +\n"
  "> > +\t\tret = meson_gpio_irq_allocate_gic_irq(domain, virq\n"
  "> > + i,\n"
- "> > +\t\t\t\t\t\t??????source,\n"
+ "> > +\t\t\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240source,\n"
  "> > type);\n"
  "> \n"
  "> Resource leak on error.\n"
@@ -651,8 +666,8 @@
  "> > +}\n"
  "> > +\n"
  "> > +static void meson_gpio_irq_domain_free(struct irq_domain *domain,\n"
- "> > +\t\t\t\t???????unsigned int virq,\n"
- "> > +\t\t\t\t???????unsigned int nr_irqs)\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240unsigned int virq,\n"
+ "> > +\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240unsigned int nr_irqs)\n"
  "> > +{\n"
  "> > +\tstruct meson_gpio_irq_domain *domain_data = domain-\n"
  "> > >host_data;\n"
@@ -688,9 +703,9 @@
  "> > +\n"
  "> > +static int __init\n"
  "> > +meson_gpio_irq_init_domain(struct device_node *node,\n"
- "> > +\t\t\t???struct meson_gpio_irq_domain\n"
+ "> > +\t\t\t\302\240\302\240\302\240struct meson_gpio_irq_domain\n"
  "> > *domain_data,\n"
- "> > +\t\t\t???const struct meson_gpio_irq_params\n"
+ "> > +\t\t\t\302\240\302\240\302\240const struct meson_gpio_irq_params\n"
  "> > *params)\n"
  "> > +{\n"
  "> > +\tint i;\n"
@@ -715,7 +730,7 @@
  "> > +}\n"
  "> > +\n"
  "> > +static int __init meson_gpio_irq_of_init(struct device_node *node,\n"
- "> > +\t\t\t\t\t?struct device_node\n"
+ "> > +\t\t\t\t\t\302\240struct device_node\n"
  "> > *parent)\n"
  "> > +{\n"
  "> > +\tstruct irq_domain *domain, *parent_domain;\n"
@@ -757,9 +772,9 @@
  "> > +\n"
  "> > +\tdomain = irq_domain_add_hierarchy(parent_domain, 0,\n"
  "> > params->nhwirq,\n"
- "> > +\t\t\t\t\t??node,\n"
+ "> > +\t\t\t\t\t\302\240\302\240node,\n"
  "> > &meson_gpio_irq_domain_ops,\n"
- "> > +\t\t\t\t\t??domain_data);\n"
+ "> > +\t\t\t\t\t\302\240\302\240domain_data);\n"
  "> \n"
  "> Please be consistent in using the fwnode API instead of the of_node\n"
  "> one.\n"
@@ -809,4 +824,4 @@
  "> \n"
  "> \tM."
 
-61dfb0c3764c40e9ee4b976af993e882cbae26d4a9240771dde72c18bc147ec1
+1916e896fa6a4b5322558970094b1ff19f90fe12a0502ace078d3ca470da0b99

diff --git a/a/content_digest b/N2/content_digest
index 486ab82..f6aeec9 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -4,7 +4,7 @@
  "From\0jbrunet@baylibre.com (Jerome Brunet)\0"
  "Subject\0[PATCH v2 1/9] irqchip: meson: add support for gpio interrupt controller\0"
  "Date\0Fri, 21 Oct 2016 10:49:11 +0200\0"
- "To\0linus-amlogic@lists.infradead.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:\n"
@@ -809,4 +809,4 @@
  "> \n"
  "> \tM."
 
-61dfb0c3764c40e9ee4b976af993e882cbae26d4a9240771dde72c18bc147ec1
+8dd9558563c31316a565ddfe1067e2adeca1a88dbee118dfe39f8dfa35695e7f

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