From mboxrd@z Thu Jan 1 00:00:00 1970 From: bgolaszewski@baylibre.com (Bartosz Golaszewski) Date: Mon, 24 Oct 2016 18:46:36 +0200 Subject: [RFC] ARM: memory: da8xx-ddrctl: new driver In-Reply-To: <1477327596-16060-1-git-send-email-bgolaszewski@baylibre.com> References: <1477327596-16060-1-git-send-email-bgolaszewski@baylibre.com> Message-ID: <1477327596-16060-2-git-send-email-bgolaszewski@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Create a new driver for the da8xx DDR2/mDDR controller and implement support for writing to the Peripheral Bus Burst Priority Register. Signed-off-by: Bartosz Golaszewski --- .../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++ drivers/memory/Kconfig | 8 + drivers/memory/Makefile | 1 + drivers/memory/da8xx-ddrctl.c | 187 +++++++++++++++++++++ 4 files changed, 216 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt create mode 100644 drivers/memory/da8xx-ddrctl.c diff --git a/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt new file mode 100644 index 0000000..f0eda59 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt @@ -0,0 +1,20 @@ +* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller + +The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs memory +maps a set of registers which allow to tweak the controller's behavior. + +Documentation: +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf + +Required properties: + +- compatible: "ti,da850-ddrctl" - for da850 SoC based boards +- reg: a tuple containing the base address of the memory + controller and the size of the memory area to map + +Example for da850 shown below. + +ddrctl { + compatible = "ti,da850-ddrctl"; + reg = <0xB0000000 0x100>; +}; diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 4b4c0c3..ec80e35 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -134,6 +134,14 @@ config MTK_SMI mainly help enable/disable iommu and control the power domain and clocks for each local arbiter. +config DA8XX_DDRCTL + bool "Texas Instruments da8xx DDR2/mDDR driver" + depends on ARCH_DAVINCI_DA8XX + help + This driver is for the DDR2/mDDR Memory Controller present on + Texas Instruments da8xx SoCs. It's used to tweak various memory + controller configuration options. + source "drivers/memory/samsung/Kconfig" source "drivers/memory/tegra/Kconfig" diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index b20ae38..e88097fb 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o obj-$(CONFIG_JZ4780_NEMC) += jz4780-nemc.o obj-$(CONFIG_MTK_SMI) += mtk-smi.o +obj-$(CONFIG_DA8XX_DDRCTL) += da8xx-ddrctl.o obj-$(CONFIG_SAMSUNG_MC) += samsung/ obj-$(CONFIG_TEGRA_MC) += tegra/ diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c new file mode 100644 index 0000000..756a6f3 --- /dev/null +++ b/drivers/memory/da8xx-ddrctl.c @@ -0,0 +1,187 @@ +/* + * TI da8xx DDR2/mDDR controller driver + * + * Copyright (C) 2016 BayLibre SAS + * + * Author: + * Bartosz Golaszewski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +struct da8xx_ddrctl_config_knob { + const char *name; + u32 reg; + u32 mask; + u32 offset; +}; + +static const struct da8xx_ddrctl_config_knob da8xx_ddrctl_knobs[] = { + { + .name = "da850-pbbpr", + .reg = 0x20, + .mask = 0xffffff00, + .offset = 0, + }, +}; + +struct da8xx_ddrctl_setting { + const char *name; + u32 val; +}; + +struct da8xx_ddrctl_board_settings { + const char *board; + const struct da8xx_ddrctl_setting *settings; +}; + +static const struct da8xx_ddrctl_setting da850_lcdk_ddrctl_settings[] = { + { + .name = "da850-pbbpr", + .val = 0x20, + }, + { } +}; + +static const struct da8xx_ddrctl_board_settings da8xx_ddrctl_board_confs[] = { + { + .board = "ti,da850-lcdk", + .settings = da850_lcdk_ddrctl_settings, + }, +}; + +static const struct da8xx_ddrctl_config_knob * +da8xx_ddrctl_match_knob(const struct da8xx_ddrctl_setting *setting) +{ + const struct da8xx_ddrctl_config_knob *knob; + int i; + + for (i = 0; i < ARRAY_SIZE(da8xx_ddrctl_knobs); i++) { + knob = &da8xx_ddrctl_knobs[i]; + + if (strcmp(knob->name, setting->name) == 0) { + return knob; + } + } + + return NULL; +} + +static const struct da8xx_ddrctl_setting * +da8xx_ddrctl_match_board(const char *board) +{ + const struct da8xx_ddrctl_board_settings *board_settings; + int i; + + for (i = 0; i < ARRAY_SIZE(da8xx_ddrctl_board_confs); i++) { + board_settings = &da8xx_ddrctl_board_confs[0]; + + if (strcmp(board, board_settings->board) == 0) + return board_settings->settings; + } + + return NULL; +} + +static int da8xx_ddrctl_probe(struct platform_device *pdev) +{ + const struct da8xx_ddrctl_config_knob *knob; + const struct da8xx_ddrctl_setting *setting; + u32 regprop[2], base, memsize, reg; + struct device_node *node, *parent; + void __iomem *ddrctl; + const char *board; + struct device *dev; + int ret; + + dev = &pdev->dev; + node = dev->of_node; + + /* Find the board name. */ + for (parent = node; + !of_node_is_root(parent); + parent = of_get_parent(parent)); + + ret = of_property_read_string(parent, "compatible", &board); + if (ret) { + dev_err(dev, "unable to read the soc model\n"); + return ret; + } + + /* Check if we have settings for this board. */ + setting = da8xx_ddrctl_match_board(board); + if (!setting) { + dev_err(dev, "no settings for board '%s'\n", board); + return -EINVAL; + } + + /* Figure out how to map the memory for the controller. */ + ret = of_property_read_u32_array(node, "reg", regprop, 2); + if (ret) { + dev_err(dev, "unable to parse 'reg' property\n"); + return ret; + } + + base = regprop[0]; + memsize = regprop[1]; + + ddrctl = ioremap(base, memsize); + if (!ddrctl) { + dev_err(dev, "unable to map memory controller registers\n"); + return -EIO; + } + + for (; setting->name; setting++) { + knob = da8xx_ddrctl_match_knob(setting); + if (!knob) { + dev_warn(dev, + "no such config option: %s\n", setting->name); + continue; + } + + if (knob->reg > (memsize - sizeof(u32))) { + dev_warn(dev, + "register offset of '%s' exceeds mapped memory size\n", + knob->name); + continue; + } + + reg = __raw_readl(ddrctl + knob->reg); + reg &= knob->mask; + reg |= setting->val << knob->offset; + + dev_dbg(dev, "writing 0x%08x to %s\n", reg, setting->name); + + __raw_writel(reg, ddrctl + knob->reg); + } + + iounmap(ddrctl); + + return 0; +} + +static const struct of_device_id da8xx_ddrctl_of_match[] = { + { .compatible = "ti,da850-ddrctl", }, + { }, +}; + +static struct platform_driver da8xx_ddrctl_driver = { + .probe = da8xx_ddrctl_probe, + .driver = { + .name = "da8xx-ddrctl", + .of_match_table = da8xx_ddrctl_of_match, + }, +}; +module_platform_driver(da8xx_ddrctl_driver); + +MODULE_AUTHOR("Bartosz Golaszewski "); +MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver"); +MODULE_LICENSE("GPL v2"); -- 2.9.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartosz Golaszewski Subject: [RFC] ARM: memory: da8xx-ddrctl: new driver Date: Mon, 24 Oct 2016 18:46:36 +0200 Message-ID: <1477327596-16060-2-git-send-email-bgolaszewski@baylibre.com> References: <1477327596-16060-1-git-send-email-bgolaszewski@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1477327596-16060-1-git-send-email-bgolaszewski@baylibre.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King Cc: linux-devicetree , LKML , linux-drm , Bartosz Golaszewski , Tomi Valkeinen , Jyri Sarha , arm-soc , Laurent Pinchart List-Id: devicetree@vger.kernel.org Q3JlYXRlIGEgbmV3IGRyaXZlciBmb3IgdGhlIGRhOHh4IEREUjIvbUREUiBjb250cm9sbGVyIGFu ZCBpbXBsZW1lbnQKc3VwcG9ydCBmb3Igd3JpdGluZyB0byB0aGUgUGVyaXBoZXJhbCBCdXMgQnVy c3QgUHJpb3JpdHkgUmVnaXN0ZXIuCgpTaWduZWQtb2ZmLWJ5OiBCYXJ0b3N6IEdvbGFzemV3c2tp IDxiZ29sYXN6ZXdza2lAYmF5bGlicmUuY29tPgotLS0KIC4uLi9tZW1vcnktY29udHJvbGxlcnMv dGktZGE4eHgtZGRyY3RsLnR4dCAgICAgICAgIHwgIDIwICsrKwogZHJpdmVycy9tZW1vcnkvS2Nv bmZpZyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgfCAgIDggKwogZHJpdmVycy9tZW1vcnkv TWFrZWZpbGUgICAgICAgICAgICAgICAgICAgICAgICAgICAgfCAgIDEgKwogZHJpdmVycy9tZW1v cnkvZGE4eHgtZGRyY3RsLmMgICAgICAgICAgICAgICAgICAgICAgfCAxODcgKysrKysrKysrKysr KysrKysrKysrCiA0IGZpbGVzIGNoYW5nZWQsIDIxNiBpbnNlcnRpb25zKCspCiBjcmVhdGUgbW9k ZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL21lbW9yeS1jb250cm9s bGVycy90aS1kYTh4eC1kZHJjdGwudHh0CiBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9tZW1v cnkvZGE4eHgtZGRyY3RsLmMKCmRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUv YmluZGluZ3MvbWVtb3J5LWNvbnRyb2xsZXJzL3RpLWRhOHh4LWRkcmN0bC50eHQgYi9Eb2N1bWVu dGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvbWVtb3J5LWNvbnRyb2xsZXJzL3RpLWRhOHh4LWRk cmN0bC50eHQKbmV3IGZpbGUgbW9kZSAxMDA2NDQKaW5kZXggMDAwMDAwMC4uZjBlZGE1OQotLS0g L2Rldi9udWxsCisrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9tZW1vcnkt Y29udHJvbGxlcnMvdGktZGE4eHgtZGRyY3RsLnR4dApAQCAtMCwwICsxLDIwIEBACisqIERldmlj ZSB0cmVlIGJpbmRpbmdzIGZvciBUZXhhcyBJbnN0cnVtZW50cyBkYTh4eCBERFIyL21ERFIgbWVt b3J5IGNvbnRyb2xsZXIKKworVGhlIEREUjIvbUREUiBtZW1vcnkgY29udHJvbGxlciBwcmVzZW50 IG9uIFRleGFzIEluc3RydW1lbnRzIGRhOHh4IFNvQ3MgbWVtb3J5CittYXBzIGEgc2V0IG9mIHJl Z2lzdGVycyB3aGljaCBhbGxvdyB0byB0d2VhayB0aGUgY29udHJvbGxlcidzIGJlaGF2aW9yLgor CitEb2N1bWVudGF0aW9uOgorT01BUC1MMTM4IChEQTg1MCkgLSBodHRwOi8vd3d3LnRpLmNvbS9s aXQvdWcvc3BydWg4MmMvc3BydWg4MmMucGRmCisKK1JlcXVpcmVkIHByb3BlcnRpZXM6CisKKy0g Y29tcGF0aWJsZToJCSJ0aSxkYTg1MC1kZHJjdGwiIC0gZm9yIGRhODUwIFNvQyBiYXNlZCBib2Fy ZHMKKy0gcmVnOgkJCWEgdHVwbGUgY29udGFpbmluZyB0aGUgYmFzZSBhZGRyZXNzIG9mIHRoZSBt ZW1vcnkKKwkJCWNvbnRyb2xsZXIgYW5kIHRoZSBzaXplIG9mIHRoZSBtZW1vcnkgYXJlYSB0byBt YXAKKworRXhhbXBsZSBmb3IgZGE4NTAgc2hvd24gYmVsb3cuCisKK2RkcmN0bCB7CisJY29tcGF0 aWJsZSA9ICJ0aSxkYTg1MC1kZHJjdGwiOworCXJlZyA9IDwweEIwMDAwMDAwIDB4MTAwPjsKK307 CmRpZmYgLS1naXQgYS9kcml2ZXJzL21lbW9yeS9LY29uZmlnIGIvZHJpdmVycy9tZW1vcnkvS2Nv bmZpZwppbmRleCA0YjRjMGMzLi5lYzgwZTM1IDEwMDY0NAotLS0gYS9kcml2ZXJzL21lbW9yeS9L Y29uZmlnCisrKyBiL2RyaXZlcnMvbWVtb3J5L0tjb25maWcKQEAgLTEzNCw2ICsxMzQsMTQgQEAg Y29uZmlnIE1US19TTUkKIAkgIG1haW5seSBoZWxwIGVuYWJsZS9kaXNhYmxlIGlvbW11IGFuZCBj b250cm9sIHRoZSBwb3dlciBkb21haW4gYW5kCiAJICBjbG9ja3MgZm9yIGVhY2ggbG9jYWwgYXJi aXRlci4KIAorY29uZmlnIERBOFhYX0REUkNUTAorCWJvb2wgIlRleGFzIEluc3RydW1lbnRzIGRh OHh4IEREUjIvbUREUiBkcml2ZXIiCisJZGVwZW5kcyBvbiBBUkNIX0RBVklOQ0lfREE4WFgKKwlo ZWxwCisJICBUaGlzIGRyaXZlciBpcyBmb3IgdGhlIEREUjIvbUREUiBNZW1vcnkgQ29udHJvbGxl ciBwcmVzZW50IG9uCisJICBUZXhhcyBJbnN0cnVtZW50cyBkYTh4eCBTb0NzLiBJdCdzIHVzZWQg dG8gdHdlYWsgdmFyaW91cyBtZW1vcnkKKwkgIGNvbnRyb2xsZXIgY29uZmlndXJhdGlvbiBvcHRp b25zLgorCiBzb3VyY2UgImRyaXZlcnMvbWVtb3J5L3NhbXN1bmcvS2NvbmZpZyIKIHNvdXJjZSAi ZHJpdmVycy9tZW1vcnkvdGVncmEvS2NvbmZpZyIKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9tZW1v cnkvTWFrZWZpbGUgYi9kcml2ZXJzL21lbW9yeS9NYWtlZmlsZQppbmRleCBiMjBhZTM4Li5lODgw OTdmYiAxMDA2NDQKLS0tIGEvZHJpdmVycy9tZW1vcnkvTWFrZWZpbGUKKysrIGIvZHJpdmVycy9t ZW1vcnkvTWFrZWZpbGUKQEAgLTE3LDYgKzE3LDcgQEAgb2JqLSQoQ09ORklHX01WRUJVX0RFVkJV UykJKz0gbXZlYnUtZGV2YnVzLm8KIG9iai0kKENPTkZJR19URUdSQTIwX01DKQkrPSB0ZWdyYTIw LW1jLm8KIG9iai0kKENPTkZJR19KWjQ3ODBfTkVNQykJKz0gano0NzgwLW5lbWMubwogb2JqLSQo Q09ORklHX01US19TTUkpCQkrPSBtdGstc21pLm8KK29iai0kKENPTkZJR19EQThYWF9ERFJDVEwp CSs9IGRhOHh4LWRkcmN0bC5vCiAKIG9iai0kKENPTkZJR19TQU1TVU5HX01DKQkrPSBzYW1zdW5n Lwogb2JqLSQoQ09ORklHX1RFR1JBX01DKQkJKz0gdGVncmEvCmRpZmYgLS1naXQgYS9kcml2ZXJz L21lbW9yeS9kYTh4eC1kZHJjdGwuYyBiL2RyaXZlcnMvbWVtb3J5L2RhOHh4LWRkcmN0bC5jCm5l dyBmaWxlIG1vZGUgMTAwNjQ0CmluZGV4IDAwMDAwMDAuLjc1NmE2ZjMKLS0tIC9kZXYvbnVsbAor KysgYi9kcml2ZXJzL21lbW9yeS9kYTh4eC1kZHJjdGwuYwpAQCAtMCwwICsxLDE4NyBAQAorLyoK KyAqIFRJIGRhOHh4IEREUjIvbUREUiBjb250cm9sbGVyIGRyaXZlcgorICoKKyAqIENvcHlyaWdo dCAoQykgMjAxNiBCYXlMaWJyZSBTQVMKKyAqCisgKiBBdXRob3I6CisgKiAgIEJhcnRvc3ogR29s YXN6ZXdza2kgPGJnb2xhc3pld3NraUBiYXlsaWJyZS5jb20+CisgKgorICogVGhpcyBwcm9ncmFt IGlzIGZyZWUgc29mdHdhcmU7IHlvdSBjYW4gcmVkaXN0cmlidXRlIGl0IGFuZC9vciBtb2RpZnkK KyAqIGl0IHVuZGVyIHRoZSB0ZXJtcyBvZiB0aGUgR05VIEdlbmVyYWwgUHVibGljIExpY2Vuc2Ug dmVyc2lvbiAyIGFzCisgKiBwdWJsaXNoZWQgYnkgdGhlIEZyZWUgU29mdHdhcmUgRm91bmRhdGlv bi4KKyAqLworCisjaW5jbHVkZSA8bGludXgvbW9kdWxlLmg+CisjaW5jbHVkZSA8bGludXgvb2Yu aD4KKyNpbmNsdWRlIDxsaW51eC9vZl9kZXZpY2UuaD4KKyNpbmNsdWRlIDxsaW51eC9wbGF0Zm9y bV9kZXZpY2UuaD4KKyNpbmNsdWRlIDxsaW51eC9pby5oPgorCitzdHJ1Y3QgZGE4eHhfZGRyY3Rs X2NvbmZpZ19rbm9iIHsKKwljb25zdCBjaGFyICpuYW1lOworCXUzMiByZWc7CisJdTMyIG1hc2s7 CisJdTMyIG9mZnNldDsKK307CisKK3N0YXRpYyBjb25zdCBzdHJ1Y3QgZGE4eHhfZGRyY3RsX2Nv bmZpZ19rbm9iIGRhOHh4X2RkcmN0bF9rbm9ic1tdID0geworCXsKKwkJLm5hbWUgPSAiZGE4NTAt cGJicHIiLAorCQkucmVnID0gMHgyMCwKKwkJLm1hc2sgPSAweGZmZmZmZjAwLAorCQkub2Zmc2V0 ID0gMCwKKwl9LAorfTsKKworc3RydWN0IGRhOHh4X2RkcmN0bF9zZXR0aW5nIHsKKwljb25zdCBj aGFyICpuYW1lOworCXUzMiB2YWw7Cit9OworCitzdHJ1Y3QgZGE4eHhfZGRyY3RsX2JvYXJkX3Nl dHRpbmdzIHsKKwljb25zdCBjaGFyICpib2FyZDsKKwljb25zdCBzdHJ1Y3QgZGE4eHhfZGRyY3Rs X3NldHRpbmcgKnNldHRpbmdzOworfTsKKworc3RhdGljIGNvbnN0IHN0cnVjdCBkYTh4eF9kZHJj dGxfc2V0dGluZyBkYTg1MF9sY2RrX2RkcmN0bF9zZXR0aW5nc1tdID0geworCXsKKwkJLm5hbWUg PSAiZGE4NTAtcGJicHIiLAorCQkudmFsID0gMHgyMCwKKwl9LAorCXsgfQorfTsKKworc3RhdGlj IGNvbnN0IHN0cnVjdCBkYTh4eF9kZHJjdGxfYm9hcmRfc2V0dGluZ3MgZGE4eHhfZGRyY3RsX2Jv YXJkX2NvbmZzW10gPSB7CisJeworCQkuYm9hcmQgPSAidGksZGE4NTAtbGNkayIsCisJCS5zZXR0 aW5ncyA9IGRhODUwX2xjZGtfZGRyY3RsX3NldHRpbmdzLAorCX0sCit9OworCitzdGF0aWMgY29u c3Qgc3RydWN0IGRhOHh4X2RkcmN0bF9jb25maWdfa25vYiAqCitkYTh4eF9kZHJjdGxfbWF0Y2hf a25vYihjb25zdCBzdHJ1Y3QgZGE4eHhfZGRyY3RsX3NldHRpbmcgKnNldHRpbmcpCit7CisJY29u c3Qgc3RydWN0IGRhOHh4X2RkcmN0bF9jb25maWdfa25vYiAqa25vYjsKKwlpbnQgaTsKKworCWZv ciAoaSA9IDA7IGkgPCBBUlJBWV9TSVpFKGRhOHh4X2RkcmN0bF9rbm9icyk7IGkrKykgeworCQlr bm9iID0gJmRhOHh4X2RkcmN0bF9rbm9ic1tpXTsKKworCQlpZiAoc3RyY21wKGtub2ItPm5hbWUs IHNldHRpbmctPm5hbWUpID09IDApIHsKKwkJCXJldHVybiBrbm9iOworCQl9CisJfQorCisJcmV0 dXJuIE5VTEw7Cit9CisKK3N0YXRpYyBjb25zdCBzdHJ1Y3QgZGE4eHhfZGRyY3RsX3NldHRpbmcg KgorZGE4eHhfZGRyY3RsX21hdGNoX2JvYXJkKGNvbnN0IGNoYXIgKmJvYXJkKQoreworCWNvbnN0 IHN0cnVjdCBkYTh4eF9kZHJjdGxfYm9hcmRfc2V0dGluZ3MgKmJvYXJkX3NldHRpbmdzOworCWlu dCBpOworCisJZm9yIChpID0gMDsgaSA8IEFSUkFZX1NJWkUoZGE4eHhfZGRyY3RsX2JvYXJkX2Nv bmZzKTsgaSsrKSB7CisJCWJvYXJkX3NldHRpbmdzID0gJmRhOHh4X2RkcmN0bF9ib2FyZF9jb25m c1swXTsKKworCQlpZiAoc3RyY21wKGJvYXJkLCBib2FyZF9zZXR0aW5ncy0+Ym9hcmQpID09IDAp CisJCQlyZXR1cm4gYm9hcmRfc2V0dGluZ3MtPnNldHRpbmdzOworCX0KKworCXJldHVybiBOVUxM OworfQorCitzdGF0aWMgaW50IGRhOHh4X2RkcmN0bF9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2 aWNlICpwZGV2KQoreworCWNvbnN0IHN0cnVjdCBkYTh4eF9kZHJjdGxfY29uZmlnX2tub2IgKmtu b2I7CisJY29uc3Qgc3RydWN0IGRhOHh4X2RkcmN0bF9zZXR0aW5nICpzZXR0aW5nOworCXUzMiBy ZWdwcm9wWzJdLCBiYXNlLCBtZW1zaXplLCByZWc7CisJc3RydWN0IGRldmljZV9ub2RlICpub2Rl LCAqcGFyZW50OworCXZvaWQgX19pb21lbSAqZGRyY3RsOworCWNvbnN0IGNoYXIgKmJvYXJkOwor CXN0cnVjdCBkZXZpY2UgKmRldjsKKwlpbnQgcmV0OworCisJZGV2ID0gJnBkZXYtPmRldjsKKwlu b2RlID0gZGV2LT5vZl9ub2RlOworCisJLyogRmluZCB0aGUgYm9hcmQgbmFtZS4gKi8KKwlmb3Ig KHBhcmVudCA9IG5vZGU7CisJICAgICAhb2Zfbm9kZV9pc19yb290KHBhcmVudCk7CisJICAgICBw YXJlbnQgPSBvZl9nZXRfcGFyZW50KHBhcmVudCkpOworCisJcmV0ID0gb2ZfcHJvcGVydHlfcmVh ZF9zdHJpbmcocGFyZW50LCAiY29tcGF0aWJsZSIsICZib2FyZCk7CisJaWYgKHJldCkgeworCQlk ZXZfZXJyKGRldiwgInVuYWJsZSB0byByZWFkIHRoZSBzb2MgbW9kZWxcbiIpOworCQlyZXR1cm4g cmV0OworCX0KKworCS8qIENoZWNrIGlmIHdlIGhhdmUgc2V0dGluZ3MgZm9yIHRoaXMgYm9hcmQu ICovCisJc2V0dGluZyA9IGRhOHh4X2RkcmN0bF9tYXRjaF9ib2FyZChib2FyZCk7CisJaWYgKCFz ZXR0aW5nKSB7CisJCWRldl9lcnIoZGV2LCAibm8gc2V0dGluZ3MgZm9yIGJvYXJkICclcydcbiIs IGJvYXJkKTsKKwkJcmV0dXJuIC1FSU5WQUw7CisJfQorCisJLyogRmlndXJlIG91dCBob3cgdG8g bWFwIHRoZSBtZW1vcnkgZm9yIHRoZSBjb250cm9sbGVyLiAqLworCXJldCA9IG9mX3Byb3BlcnR5 X3JlYWRfdTMyX2FycmF5KG5vZGUsICJyZWciLCByZWdwcm9wLCAyKTsKKwlpZiAocmV0KSB7CisJ CWRldl9lcnIoZGV2LCAidW5hYmxlIHRvIHBhcnNlICdyZWcnIHByb3BlcnR5XG4iKTsKKwkJcmV0 dXJuIHJldDsKKwl9CisKKwliYXNlID0gcmVncHJvcFswXTsKKwltZW1zaXplID0gcmVncHJvcFsx XTsKKworCWRkcmN0bCA9IGlvcmVtYXAoYmFzZSwgbWVtc2l6ZSk7CisJaWYgKCFkZHJjdGwpIHsK KwkJZGV2X2VycihkZXYsICJ1bmFibGUgdG8gbWFwIG1lbW9yeSBjb250cm9sbGVyIHJlZ2lzdGVy c1xuIik7CisJCXJldHVybiAtRUlPOworCX0KKworCWZvciAoOyBzZXR0aW5nLT5uYW1lOyBzZXR0 aW5nKyspIHsKKwkJa25vYiA9IGRhOHh4X2RkcmN0bF9tYXRjaF9rbm9iKHNldHRpbmcpOworCQlp ZiAoIWtub2IpIHsKKwkJCWRldl93YXJuKGRldiwKKwkJCQkgIm5vIHN1Y2ggY29uZmlnIG9wdGlv bjogJXNcbiIsIHNldHRpbmctPm5hbWUpOworCQkJY29udGludWU7CisJCX0KKworCQlpZiAoa25v Yi0+cmVnID4gKG1lbXNpemUgLSBzaXplb2YodTMyKSkpIHsKKwkJCWRldl93YXJuKGRldiwKKwkJ CQkgInJlZ2lzdGVyIG9mZnNldCBvZiAnJXMnIGV4Y2VlZHMgbWFwcGVkIG1lbW9yeSBzaXplXG4i LAorCQkJCSBrbm9iLT5uYW1lKTsKKwkJCWNvbnRpbnVlOworCQl9CisKKwkJcmVnID0gX19yYXdf cmVhZGwoZGRyY3RsICsga25vYi0+cmVnKTsKKwkJcmVnICY9IGtub2ItPm1hc2s7CisJCXJlZyB8 PSBzZXR0aW5nLT52YWwgPDwga25vYi0+b2Zmc2V0OworCisJCWRldl9kYmcoZGV2LCAid3JpdGlu ZyAweCUwOHggdG8gJXNcbiIsIHJlZywgc2V0dGluZy0+bmFtZSk7CisKKwkJX19yYXdfd3JpdGVs KHJlZywgZGRyY3RsICsga25vYi0+cmVnKTsKKwl9CisKKwlpb3VubWFwKGRkcmN0bCk7CisKKwly ZXR1cm4gMDsKK30KKworc3RhdGljIGNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQgZGE4eHhfZGRy Y3RsX29mX21hdGNoW10gPSB7CisJeyAuY29tcGF0aWJsZSA9ICJ0aSxkYTg1MC1kZHJjdGwiLCB9 LAorCXsgfSwKK307CisKK3N0YXRpYyBzdHJ1Y3QgcGxhdGZvcm1fZHJpdmVyIGRhOHh4X2RkcmN0 bF9kcml2ZXIgPSB7CisJLnByb2JlID0gZGE4eHhfZGRyY3RsX3Byb2JlLAorCS5kcml2ZXIgPSB7 CisJCS5uYW1lID0gImRhOHh4LWRkcmN0bCIsCisJCS5vZl9tYXRjaF90YWJsZSA9IGRhOHh4X2Rk cmN0bF9vZl9tYXRjaCwKKwl9LAorfTsKK21vZHVsZV9wbGF0Zm9ybV9kcml2ZXIoZGE4eHhfZGRy Y3RsX2RyaXZlcik7CisKK01PRFVMRV9BVVRIT1IoIkJhcnRvc3ogR29sYXN6ZXdza2kgPGJnb2xh c3pld3NraUBiYXlsaWJyZS5jb20+Iik7CitNT0RVTEVfREVTQ1JJUFRJT04oIlRJIGRhOHh4IERE UjIvbUREUiBjb250cm9sbGVyIGRyaXZlciIpOworTU9EVUxFX0xJQ0VOU0UoIkdQTCB2MiIpOwot LSAKMi45LjMKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpo dHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S941431AbcJXQvF (ORCPT ); Mon, 24 Oct 2016 12:51:05 -0400 Received: from mail-wm0-f50.google.com ([74.125.82.50]:37141 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753766AbcJXQqr (ORCPT ); Mon, 24 Oct 2016 12:46:47 -0400 From: Bartosz Golaszewski To: Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King Cc: LKML , arm-soc , linux-drm , linux-devicetree , Jyri Sarha , Tomi Valkeinen , David Airlie , Laurent Pinchart , Bartosz Golaszewski Subject: [RFC] ARM: memory: da8xx-ddrctl: new driver Date: Mon, 24 Oct 2016 18:46:36 +0200 Message-Id: <1477327596-16060-2-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1477327596-16060-1-git-send-email-bgolaszewski@baylibre.com> References: <1477327596-16060-1-git-send-email-bgolaszewski@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Create a new driver for the da8xx DDR2/mDDR controller and implement support for writing to the Peripheral Bus Burst Priority Register. Signed-off-by: Bartosz Golaszewski --- .../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++ drivers/memory/Kconfig | 8 + drivers/memory/Makefile | 1 + drivers/memory/da8xx-ddrctl.c | 187 +++++++++++++++++++++ 4 files changed, 216 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt create mode 100644 drivers/memory/da8xx-ddrctl.c diff --git a/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt new file mode 100644 index 0000000..f0eda59 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt @@ -0,0 +1,20 @@ +* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller + +The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs memory +maps a set of registers which allow to tweak the controller's behavior. + +Documentation: +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf + +Required properties: + +- compatible: "ti,da850-ddrctl" - for da850 SoC based boards +- reg: a tuple containing the base address of the memory + controller and the size of the memory area to map + +Example for da850 shown below. + +ddrctl { + compatible = "ti,da850-ddrctl"; + reg = <0xB0000000 0x100>; +}; diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 4b4c0c3..ec80e35 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -134,6 +134,14 @@ config MTK_SMI mainly help enable/disable iommu and control the power domain and clocks for each local arbiter. +config DA8XX_DDRCTL + bool "Texas Instruments da8xx DDR2/mDDR driver" + depends on ARCH_DAVINCI_DA8XX + help + This driver is for the DDR2/mDDR Memory Controller present on + Texas Instruments da8xx SoCs. It's used to tweak various memory + controller configuration options. + source "drivers/memory/samsung/Kconfig" source "drivers/memory/tegra/Kconfig" diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index b20ae38..e88097fb 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o obj-$(CONFIG_JZ4780_NEMC) += jz4780-nemc.o obj-$(CONFIG_MTK_SMI) += mtk-smi.o +obj-$(CONFIG_DA8XX_DDRCTL) += da8xx-ddrctl.o obj-$(CONFIG_SAMSUNG_MC) += samsung/ obj-$(CONFIG_TEGRA_MC) += tegra/ diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c new file mode 100644 index 0000000..756a6f3 --- /dev/null +++ b/drivers/memory/da8xx-ddrctl.c @@ -0,0 +1,187 @@ +/* + * TI da8xx DDR2/mDDR controller driver + * + * Copyright (C) 2016 BayLibre SAS + * + * Author: + * Bartosz Golaszewski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +struct da8xx_ddrctl_config_knob { + const char *name; + u32 reg; + u32 mask; + u32 offset; +}; + +static const struct da8xx_ddrctl_config_knob da8xx_ddrctl_knobs[] = { + { + .name = "da850-pbbpr", + .reg = 0x20, + .mask = 0xffffff00, + .offset = 0, + }, +}; + +struct da8xx_ddrctl_setting { + const char *name; + u32 val; +}; + +struct da8xx_ddrctl_board_settings { + const char *board; + const struct da8xx_ddrctl_setting *settings; +}; + +static const struct da8xx_ddrctl_setting da850_lcdk_ddrctl_settings[] = { + { + .name = "da850-pbbpr", + .val = 0x20, + }, + { } +}; + +static const struct da8xx_ddrctl_board_settings da8xx_ddrctl_board_confs[] = { + { + .board = "ti,da850-lcdk", + .settings = da850_lcdk_ddrctl_settings, + }, +}; + +static const struct da8xx_ddrctl_config_knob * +da8xx_ddrctl_match_knob(const struct da8xx_ddrctl_setting *setting) +{ + const struct da8xx_ddrctl_config_knob *knob; + int i; + + for (i = 0; i < ARRAY_SIZE(da8xx_ddrctl_knobs); i++) { + knob = &da8xx_ddrctl_knobs[i]; + + if (strcmp(knob->name, setting->name) == 0) { + return knob; + } + } + + return NULL; +} + +static const struct da8xx_ddrctl_setting * +da8xx_ddrctl_match_board(const char *board) +{ + const struct da8xx_ddrctl_board_settings *board_settings; + int i; + + for (i = 0; i < ARRAY_SIZE(da8xx_ddrctl_board_confs); i++) { + board_settings = &da8xx_ddrctl_board_confs[0]; + + if (strcmp(board, board_settings->board) == 0) + return board_settings->settings; + } + + return NULL; +} + +static int da8xx_ddrctl_probe(struct platform_device *pdev) +{ + const struct da8xx_ddrctl_config_knob *knob; + const struct da8xx_ddrctl_setting *setting; + u32 regprop[2], base, memsize, reg; + struct device_node *node, *parent; + void __iomem *ddrctl; + const char *board; + struct device *dev; + int ret; + + dev = &pdev->dev; + node = dev->of_node; + + /* Find the board name. */ + for (parent = node; + !of_node_is_root(parent); + parent = of_get_parent(parent)); + + ret = of_property_read_string(parent, "compatible", &board); + if (ret) { + dev_err(dev, "unable to read the soc model\n"); + return ret; + } + + /* Check if we have settings for this board. */ + setting = da8xx_ddrctl_match_board(board); + if (!setting) { + dev_err(dev, "no settings for board '%s'\n", board); + return -EINVAL; + } + + /* Figure out how to map the memory for the controller. */ + ret = of_property_read_u32_array(node, "reg", regprop, 2); + if (ret) { + dev_err(dev, "unable to parse 'reg' property\n"); + return ret; + } + + base = regprop[0]; + memsize = regprop[1]; + + ddrctl = ioremap(base, memsize); + if (!ddrctl) { + dev_err(dev, "unable to map memory controller registers\n"); + return -EIO; + } + + for (; setting->name; setting++) { + knob = da8xx_ddrctl_match_knob(setting); + if (!knob) { + dev_warn(dev, + "no such config option: %s\n", setting->name); + continue; + } + + if (knob->reg > (memsize - sizeof(u32))) { + dev_warn(dev, + "register offset of '%s' exceeds mapped memory size\n", + knob->name); + continue; + } + + reg = __raw_readl(ddrctl + knob->reg); + reg &= knob->mask; + reg |= setting->val << knob->offset; + + dev_dbg(dev, "writing 0x%08x to %s\n", reg, setting->name); + + __raw_writel(reg, ddrctl + knob->reg); + } + + iounmap(ddrctl); + + return 0; +} + +static const struct of_device_id da8xx_ddrctl_of_match[] = { + { .compatible = "ti,da850-ddrctl", }, + { }, +}; + +static struct platform_driver da8xx_ddrctl_driver = { + .probe = da8xx_ddrctl_probe, + .driver = { + .name = "da8xx-ddrctl", + .of_match_table = da8xx_ddrctl_of_match, + }, +}; +module_platform_driver(da8xx_ddrctl_driver); + +MODULE_AUTHOR("Bartosz Golaszewski "); +MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver"); +MODULE_LICENSE("GPL v2"); -- 2.9.3