From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37291) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzDt7-0000Hj-82 for qemu-devel@nongnu.org; Tue, 25 Oct 2016 22:24:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzDt5-0000aP-GN for qemu-devel@nongnu.org; Tue, 25 Oct 2016 22:24:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50744) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bzDt5-0000aJ-At for qemu-devel@nongnu.org; Tue, 25 Oct 2016 22:24:19 -0400 From: Jason Wang Date: Wed, 26 Oct 2016 10:24:03 +0800 Message-Id: <1477448651-4474-2-git-send-email-jasowang@redhat.com> In-Reply-To: <1477448651-4474-1-git-send-email-jasowang@redhat.com> References: <1477448651-4474-1-git-send-email-jasowang@redhat.com> Subject: [Qemu-devel] [PULL 1/9] net: pcnet: check rx/tx descriptor ring length List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: Prasad J Pandit , Jason Wang From: Prasad J Pandit The AMD PC-Net II emulator has set of control and status(CSR) registers. Of these, CSR76 and CSR78 hold receive and transmit descriptor ring length respectively. This ring length could range from 1 to 65535. Setting ring length to zero leads to an infinite loop in pcnet_rdra_addr() or pcnet_transmit(). Add check to avoid it. Reported-by: Li Qiang Signed-off-by: Prasad J Pandit Signed-off-by: Jason Wang --- hw/net/pcnet.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/net/pcnet.c b/hw/net/pcnet.c index 198a01f..3078de8 100644 --- a/hw/net/pcnet.c +++ b/hw/net/pcnet.c @@ -1429,8 +1429,11 @@ static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value) case 47: /* POLLINT */ case 72: case 74: + break; case 76: /* RCVRL */ case 78: /* XMTRL */ + val = (val > 0) ? val : 512; + break; case 112: if (CSR_STOP(s) || CSR_SPND(s)) break; -- 2.7.4