diff for duplicates of <1477501566.6812.9.camel@buserror.net> diff --git a/a/1.txt b/N1/1.txt index de9498e..b982b13 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -15,101 +15,101 @@ On Wed, 2016-09-21 at 14:57 +0800, Yangbo Lu wrote: > + bool "Freescale QorIQ GUTS driver" > + select SOC_BUS > + help -> + The global utilities block controls power management, I/O device -> + enabling, power-onreset(POR) configuration monitoring, alternate -> + function selection for multiplexed signals,and clock control. -> + This driver is to manage and access global utilities block. -> + Initially only reading SVR and registering soc device are +> + ??The global utilities block controls power management, I/O device +> + ??enabling, power-onreset(POR) configuration monitoring, alternate +> + ??function selection for multiplexed signals,and clock control. +> + ??This driver is to manage and access global utilities block. +> + ??Initially only reading SVR and registering soc device are > supported. -> + Other guts accesses, such as reading RCW, should eventually be +> + ??Other guts accesses, such as reading RCW, should eventually be > moved -> + into this driver as well. +> + ??into this driver as well. > + -> + If you want GUTS driver support, you should say Y here. +> + ??If you want GUTS driver support, you should say Y here. This is user-enablable without dependencies, which means it will break some -randconfigs. If this is to be enabled via select then remove the text after +randconfigs. ?If this is to be enabled via select then remove the text after "bool". > +/* SoC die attribute definition for QorIQ platform */ > +static const struct fsl_soc_die_attr fsl_soc_die[] = { > +#ifdef CONFIG_PPC > + /* -> + * Power Architecture-based SoCs T Series -> + */ +> + ?* Power Architecture-based SoCs T Series +> + ?*/ > + > + /* Die: T4240, SoC: T4240/T4160/T4080 */ > + { .die = "T4240", -> + .svr = 0x82400000, -> + .mask = 0xfff00000, +> + ??.svr = 0x82400000, +> + ??.mask = 0xfff00000, > + }, > + /* Die: T1040, SoC: T1040/T1020/T1042/T1022 */ > + { .die = "T1040", -> + .svr = 0x85200000, -> + .mask = 0xfff00000, +> + ??.svr = 0x85200000, +> + ??.mask = 0xfff00000, > + }, > + /* Die: T2080, SoC: T2080/T2081 */ > + { .die = "T2080", -> + .svr = 0x85300000, -> + .mask = 0xfff00000, +> + ??.svr = 0x85300000, +> + ??.mask = 0xfff00000, > + }, > + /* Die: T1024, SoC: T1024/T1014/T1023/T1013 */ > + { .die = "T1024", -> + .svr = 0x85400000, -> + .mask = 0xfff00000, +> + ??.svr = 0x85400000, +> + ??.mask = 0xfff00000, > + }, > +#endif /* CONFIG_PPC */ > +#if defined(CONFIG_ARCH_MXC) || defined(CONFIG_ARCH_LAYERSCAPE) -Will this driver ever be probed on MXC? Why do we need these ifdefs at all? +Will this driver ever be probed on MXC? ?Why do we need these ifdefs at all? > + /* -> + * ARM-based SoCs LS Series -> + */ +> + ?* ARM-based SoCs LS Series +> + ?*/ > + > + /* Die: LS1043A, SoC: LS1043A/LS1023A */ > + { .die = "LS1043A", -> + .svr = 0x87920000, -> + .mask = 0xffff0000, +> + ??.svr = 0x87920000, +> + ??.mask = 0xffff0000, > + }, > + /* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */ > + { .die = "LS2080A", -> + .svr = 0x87010000, -> + .mask = 0xff3f0000, +> + ??.svr = 0x87010000, +> + ??.mask = 0xff3f0000, > + }, > + /* Die: LS1088A, SoC: LS1088A/LS1048A/LS1084A/LS1044A */ > + { .die = "LS1088A", -> + .svr = 0x87030000, -> + .mask = 0xff3f0000, +> + ??.svr = 0x87030000, +> + ??.mask = 0xff3f0000, > + }, > + /* Die: LS1012A, SoC: LS1012A */ > + { .die = "LS1012A", -> + .svr = 0x87040000, -> + .mask = 0xffff0000, +> + ??.svr = 0x87040000, +> + ??.mask = 0xffff0000, > + }, > + /* Die: LS1046A, SoC: LS1046A/LS1026A */ > + { .die = "LS1046A", -> + .svr = 0x87070000, -> + .mask = 0xffff0000, +> + ??.svr = 0x87070000, +> + ??.mask = 0xffff0000, > + }, > + /* Die: LS2088A, SoC: LS2088A/LS2048A/LS2084A/LS2044A */ > + { .die = "LS2088A", -> + .svr = 0x87090000, -> + .mask = 0xff3f0000, +> + ??.svr = 0x87090000, +> + ??.mask = 0xff3f0000, > + }, > + /* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A -> + * Note: Put this die at the end in cause of incorrect +> + ?* Note: Put this die at the end in cause of incorrect > identification -> + */ +> + ?*/ > + { .die = "LS1021A", -> + .svr = 0x87000000, -> + .mask = 0xfff00000, +> + ??.svr = 0x87000000, +> + ??.mask = 0xfff00000, > + }, > +#endif /* CONFIG_ARCH_MXC || CONFIG_ARCH_LAYERSCAPE */ Instead of relying on ordering, add more bits to the mask so that there's no -overlap. I think 0xfff70000 would work. +overlap. ?I think 0xfff70000 would work. > +out: > + kfree(soc_dev_attr.machine); diff --git a/a/content_digest b/N1/content_digest index d6fd712..9c6fcf6 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,33 +1,9 @@ "ref\01474441040-11946-1-git-send-email-yangbo.lu@nxp.com\0" "ref\01474441040-11946-6-git-send-email-yangbo.lu@nxp.com\0" - "From\0Scott Wood <oss@buserror.net>\0" - "Subject\0Re: [v12, 5/8] soc: fsl: add GUTS driver for QorIQ platforms\0" + "From\0oss@buserror.net (Scott Wood)\0" + "Subject\0[v12, 5/8] soc: fsl: add GUTS driver for QorIQ platforms\0" "Date\0Wed, 26 Oct 2016 12:06:06 -0500\0" - "To\0Yangbo Lu <yangbo.lu@nxp.com>" - linux-mmc@vger.kernel.org - ulf.hansson@linaro.org - " Arnd Bergmann <arnd@arndb.de>\0" - "Cc\0linuxppc-dev@lists.ozlabs.org" - devicetree@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-kernel@vger.kernel.org - linux-clk@vger.kernel.org - linux-i2c@vger.kernel.org - iommu@lists.linux-foundation.org - netdev@vger.kernel.org - Mark Rutland <mark.rutland@arm.com> - Rob Herring <robh+dt@kernel.org> - Russell King <linux@arm.linux.org.uk> - Jochen Friedrich <jochen@scram.de> - Joerg Roedel <joro@8bytes.org> - Claudiu Manoil <claudiu.manoil@freescale.com> - Bhupesh Sharma <bhupesh.sharma@freescale.com> - Qiang Zhao <qiang.zhao@nxp.com> - Kumar Gala <galak@codeaurora.org> - Santosh Shilimkar <ssantosh@kernel.org> - Leo Li <leoyang.li@nxp.com> - Xiaobo Xie <xiaobo.xie@nxp.com> - " Minghuan Lian <minghuan.lian@nxp.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, 2016-09-21 at 14:57 +0800, Yangbo Lu wrote:\n" @@ -47,101 +23,101 @@ "> +\tbool \"Freescale QorIQ GUTS driver\"\n" "> +\tselect SOC_BUS\n" "> +\thelp\n" - "> +\t\302\240\302\240The global utilities block controls power management, I/O device\n" - "> +\t\302\240\302\240enabling, power-onreset(POR) configuration monitoring, alternate\n" - "> +\t\302\240\302\240function selection for multiplexed signals,and clock control.\n" - "> +\t\302\240\302\240This driver is to manage and access global utilities block.\n" - "> +\t\302\240\302\240Initially only reading SVR and registering soc device are\n" + "> +\t??The global utilities block controls power management, I/O device\n" + "> +\t??enabling, power-onreset(POR) configuration monitoring, alternate\n" + "> +\t??function selection for multiplexed signals,and clock control.\n" + "> +\t??This driver is to manage and access global utilities block.\n" + "> +\t??Initially only reading SVR and registering soc device are\n" "> supported.\n" - "> +\t\302\240\302\240Other guts accesses, such as reading RCW, should eventually be\n" + "> +\t??Other guts accesses, such as reading RCW, should eventually be\n" "> moved\n" - "> +\t\302\240\302\240into this driver as well.\n" + "> +\t??into this driver as well.\n" "> +\n" - "> +\t\302\240\302\240If you want GUTS driver support, you should say Y here.\n" + "> +\t??If you want GUTS driver support, you should say Y here.\n" "\n" "This is user-enablable without dependencies, which means it will break some\n" - "randconfigs. \302\240If this is to be enabled via select then remove the text after\n" + "randconfigs. ?If this is to be enabled via select then remove the text after\n" "\"bool\".\n" "\n" "> +/* SoC die attribute definition for QorIQ platform */\n" "> +static const struct fsl_soc_die_attr fsl_soc_die[] = {\n" "> +#ifdef CONFIG_PPC\n" "> +\t/*\n" - "> +\t\302\240* Power Architecture-based SoCs T Series\n" - "> +\t\302\240*/\n" + "> +\t?* Power Architecture-based SoCs T Series\n" + "> +\t?*/\n" "> +\n" "> +\t/* Die: T4240, SoC: T4240/T4160/T4080 */\n" "> +\t{ .die\t\t= \"T4240\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x82400000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xfff00000,\n" + "> +\t??.svr\t\t= 0x82400000,\n" + "> +\t??.mask\t\t= 0xfff00000,\n" "> +\t},\n" "> +\t/* Die: T1040, SoC: T1040/T1020/T1042/T1022 */\n" "> +\t{ .die\t\t= \"T1040\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x85200000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xfff00000,\n" + "> +\t??.svr\t\t= 0x85200000,\n" + "> +\t??.mask\t\t= 0xfff00000,\n" "> +\t},\n" "> +\t/* Die: T2080, SoC: T2080/T2081 */\n" "> +\t{ .die\t\t= \"T2080\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x85300000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xfff00000,\n" + "> +\t??.svr\t\t= 0x85300000,\n" + "> +\t??.mask\t\t= 0xfff00000,\n" "> +\t},\n" "> +\t/* Die: T1024, SoC: T1024/T1014/T1023/T1013 */\n" "> +\t{ .die\t\t= \"T1024\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x85400000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xfff00000,\n" + "> +\t??.svr\t\t= 0x85400000,\n" + "> +\t??.mask\t\t= 0xfff00000,\n" "> +\t},\n" "> +#endif /* CONFIG_PPC */\n" "> +#if defined(CONFIG_ARCH_MXC) || defined(CONFIG_ARCH_LAYERSCAPE)\n" "\n" - "Will this driver ever be probed on MXC? \302\240Why do we need these ifdefs at all?\n" + "Will this driver ever be probed on MXC? ?Why do we need these ifdefs at all?\n" "\n" "\n" "> +\t/*\n" - "> +\t\302\240* ARM-based SoCs LS Series\n" - "> +\t\302\240*/\n" + "> +\t?* ARM-based SoCs LS Series\n" + "> +\t?*/\n" "> +\n" "> +\t/* Die: LS1043A, SoC: LS1043A/LS1023A */\n" "> +\t{ .die\t\t= \"LS1043A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87920000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xffff0000,\n" + "> +\t??.svr\t\t= 0x87920000,\n" + "> +\t??.mask\t\t= 0xffff0000,\n" "> +\t},\n" "> +\t/* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */\n" "> +\t{ .die\t\t= \"LS2080A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87010000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xff3f0000,\n" + "> +\t??.svr\t\t= 0x87010000,\n" + "> +\t??.mask\t\t= 0xff3f0000,\n" "> +\t},\n" "> +\t/* Die: LS1088A, SoC: LS1088A/LS1048A/LS1084A/LS1044A */\n" "> +\t{ .die\t\t= \"LS1088A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87030000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xff3f0000,\n" + "> +\t??.svr\t\t= 0x87030000,\n" + "> +\t??.mask\t\t= 0xff3f0000,\n" "> +\t},\n" "> +\t/* Die: LS1012A, SoC: LS1012A */\n" "> +\t{ .die\t\t= \"LS1012A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87040000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xffff0000,\n" + "> +\t??.svr\t\t= 0x87040000,\n" + "> +\t??.mask\t\t= 0xffff0000,\n" "> +\t},\n" "> +\t/* Die: LS1046A, SoC: LS1046A/LS1026A */\n" "> +\t{ .die\t\t= \"LS1046A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87070000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xffff0000,\n" + "> +\t??.svr\t\t= 0x87070000,\n" + "> +\t??.mask\t\t= 0xffff0000,\n" "> +\t},\n" "> +\t/* Die: LS2088A, SoC: LS2088A/LS2048A/LS2084A/LS2044A */\n" "> +\t{ .die\t\t= \"LS2088A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87090000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xff3f0000,\n" + "> +\t??.svr\t\t= 0x87090000,\n" + "> +\t??.mask\t\t= 0xff3f0000,\n" "> +\t},\n" "> +\t/* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A\n" - "> +\t\302\240* Note: Put this die at the end in cause of incorrect\n" + "> +\t?* Note: Put this die at the end in cause of incorrect\n" "> identification\n" - "> +\t\302\240*/\n" + "> +\t?*/\n" "> +\t{ .die\t\t= \"LS1021A\",\n" - "> +\t\302\240\302\240.svr\t\t= 0x87000000,\n" - "> +\t\302\240\302\240.mask\t\t= 0xfff00000,\n" + "> +\t??.svr\t\t= 0x87000000,\n" + "> +\t??.mask\t\t= 0xfff00000,\n" "> +\t},\n" "> +#endif /* CONFIG_ARCH_MXC || CONFIG_ARCH_LAYERSCAPE */\n" "\n" "Instead of relying on ordering, add more bits to the mask so that there's no\n" - "overlap. \302\240I think 0xfff70000 would work.\n" + "overlap. ?I think 0xfff70000 would work.\n" "\n" "> +out:\n" "> +\tkfree(soc_dev_attr.machine);\n" @@ -158,4 +134,4 @@ "\n" -Scott -c17d0a783acb95c280c09fd2b844f05d29421379a5c98b2ac31f2bbd13d30658 +ef393e0618e0f5a73f8227d4efaef15e07eedb894d78ada85f5ef840dc24518e
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.