From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Nelson Date: Sun, 30 Oct 2016 16:33:49 -0700 Subject: [U-Boot] [PATCH V2 3/4] mx6: ddr: add routine to return DDR calibration data In-Reply-To: <1477870430-18756-1-git-send-email-eric@nelint.com> References: <701ada06-690e-cd1c-51a0-a33e4b29b7ff@nelint.com> <1477870430-18756-1-git-send-email-eric@nelint.com> Message-ID: <1477870430-18756-4-git-send-email-eric@nelint.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. This routine will be used in a subsequent patch set adding a virtual "mx6memcal" board, but could also be useful when gathering statistics during an initial production run. Signed-off-by: Eric Nelson --- Commit message expanded in V2 arch/arm/cpu/armv7/mx6/ddr.c | 23 +++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 274a0ba..b12fb64 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -1501,6 +1501,29 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, mdelay(1); } +void mmdc_read_calibration(struct mx6_ddr_sysinfo const *sysinfo, + struct mx6_mmdc_calibration *calib) +{ + struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; + struct mmdc_p_regs *mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR; + + calib->p0_mpwldectrl0 = readl(&mmdc0->mpwldectrl0); + calib->p0_mpwldectrl1 = readl(&mmdc0->mpwldectrl1); + calib->p0_mpdgctrl0 = readl(&mmdc0->mpdgctrl0); + calib->p0_mpdgctrl1 = readl(&mmdc0->mpdgctrl1); + calib->p0_mprddlctl = readl(&mmdc0->mprddlctl); + calib->p0_mpwrdlctl = readl(&mmdc0->mpwrdlctl); + + if (sysinfo->dsize == 2) { + calib->p1_mpwldectrl0 = readl(&mmdc1->mpwldectrl0); + calib->p1_mpwldectrl1 = readl(&mmdc1->mpwldectrl1); + calib->p1_mpdgctrl0 = readl(&mmdc1->mpdgctrl0); + calib->p1_mpdgctrl1 = readl(&mmdc1->mpdgctrl1); + calib->p1_mprddlctl = readl(&mmdc1->mprddlctl); + calib->p1_mpwrdlctl = readl(&mmdc1->mpwrdlctl); + } +} + void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, const struct mx6_mmdc_calibration *calib, const void *ddr_cfg) diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index cd5bc97..12454fa 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -461,6 +461,8 @@ void mx6sl_dram_iocfg(unsigned width, #if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo); int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo); +void mmdc_read_calibration(struct mx6_ddr_sysinfo const *sysinfo, + struct mx6_mmdc_calibration *calib); #endif /* configure mx6 mmdc registers */ -- 2.7.4