From: Andrew Jeffery <andrew@aj.id.au>
To: Joel Stanley <joel@jms.id.au>, Xo Wang <xow@google.com>
Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>
Subject: Re: [PATCH linux] ARM: dts: aspeed-g5: Update zaius with new spi-nor binding
Date: Wed, 02 Nov 2016 10:28:52 +1030 [thread overview]
Message-ID: <1478044732.27396.3.camel@aj.id.au> (raw)
In-Reply-To: <CACPK8XfEt+8rdkffHTtfoh13akffxDhrTe0WXZA0-oGbt4FuXg@mail.gmail.com>
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On Wed, 2016-11-02 at 10:15 +1030, Joel Stanley wrote:
> Hey Xo,
>
> On Wed, Nov 2, 2016 at 10:00 AM, Xo Wang <xow@google.com> wrote:
>
> >
> > +&spi1 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_spi1_default>;
> > +
> > + flash@0 {
> > + status = "okay";
> > + label = "pnor";
> > + };
> > +};
> > +
> > +&spi2 {
> > + status = "okay";
> I think we want to request the pins here. Something like this:
>
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi2ck_default
> + &pinctrl_spi2cs0_default
> + &pinctrl_spi2cs1_default
> + &pinctrl_spi2miso_default
> + &pinctrl_spi2mosi_default>;
Yes, we need this, though maybe the chip selects should be pushed out
to the board dts?
Andrew
> +
>
> Can you try that and do a test boot on your hardware?
>
> Cheers,
>
> Joel
>
> >
> > + flash@0 {
> > + status = "okay";
> > + };
> > +};
> > +
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next prev parent reply other threads:[~2016-11-01 23:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-01 23:30 [PATCH linux] ARM: dts: aspeed-g5: Update zaius with new spi-nor binding Xo Wang
2016-11-01 23:45 ` Joel Stanley
2016-11-01 23:58 ` Andrew Jeffery [this message]
2016-11-02 0:47 ` Xo Wang
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