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From: maxims@google.com
To: openbmc@lists.ozlabs.org
Subject: [PATCH u-boot 4/5] aspeed: Added function to configure pins for I2C devices.
Date: Thu,  3 Nov 2016 11:15:03 -0700	[thread overview]
Message-ID: <1478196904-143229-4-git-send-email-maxims@google.com> (raw)
In-Reply-To: <1478196904-143229-1-git-send-email-maxims@google.com>

From: Maxim Sloyko <maxims@google.com>

In the absence of pinmux driver, I2C driver will be
configuring pins directly.

Signed-off-by: Maxim Sloyko <maxims@google.com>
---
 arch/arm/include/asm/arch-aspeed/ast_scu.h |  5 +++++
 arch/arm/mach-aspeed/ast-scu.c             | 28 ++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h
index eb5aaa2..80ebd6f 100644
--- a/arch/arm/include/asm/arch-aspeed/ast_scu.h
+++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h
@@ -46,4 +46,9 @@ extern void ast_scu_init_eth(u8 num);
 extern void ast_scu_multi_func_eth(u8 num);
 extern void ast_scu_multi_func_romcs(u8 num);
 
+/* Enable I2C controller and pins for a particular device.
+ * Device numbering starts at 1
+ */
+extern void ast_scu_enable_i2c(u8 num);
+
 #endif
diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
index e00dbe2..b5aa8bf 100644
--- a/arch/arm/mach-aspeed/ast-scu.c
+++ b/arch/arm/mach-aspeed/ast-scu.c
@@ -507,3 +507,31 @@ void ast_scu_get_who_init_dram(void)
 		break;
 	}
 }
+
+void ast_scu_enable_i2c(u8 bus_num)
+{
+	if (bus_num > SCU_I2C_MAX_BUS_NUM) {
+		debug("%s: bus_num is out of range, must be [%d - %d]\n",
+		      __func__, SCU_I2C_MIN_BUS_NUM, SCU_I2C_MAX_BUS_NUM);
+		return;
+	}
+
+	if (bus_num == 0) {
+		/* Enable I2C Controllers */
+		clrbits_le32(AST_SCU_BASE + AST_SCU_RESET, SCU_RESET_I2C);
+	} else if (bus_num >= 3) {
+		setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL5,
+			     SCU_FUN_PIN_I2C(bus_num));
+	/* In earlier versions of the SoC these pins are always assigned to
+	 * respective I2C buses and require no configuration.
+	 */
+#ifdef AST_SOC_G5
+	} else if (bus_num == 1) {
+		setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL8,
+			     SCU_FUN_PIN_SDA1 | SCU_FUN_PIN_SCL1);
+	} else if (bus_num == 2) {
+		setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL8,
+			     SCU_FUN_PIN_SDA2 | SCU_FUN_PIN_SCL2);
+#endif
+	}
+}
-- 
2.8.0.rc3.226.g39d4020

  parent reply	other threads:[~2016-11-03 18:15 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-03 18:15 [PATCH u-boot 1/5] aspeed/g5: Device Tree for ast2500, copied from openbmc/linux (include file), plus minimal device tree configuration for ast2500 eval board maxims
2016-11-03 18:15 ` [PATCH u-boot 2/5] aspeed: Fixed incosistency in some SCU registers naming maxims
2016-11-03 18:15 ` [PATCH u-boot 3/5] aspeed: Added function to calculate APB Clock frequency maxims
2016-11-03 18:15 ` maxims [this message]
2016-11-03 18:15 ` [PATCH u-boot 5/5] aspeed: I2C driver maxims
2016-11-10 17:53 ` [PATCH u-boot 1/5] aspeed/g5: Device Tree for ast2500, copied from openbmc/linux (include file), plus minimal device tree configuration for ast2500 eval board Maxim Sloyko
  -- strict thread matches above, loose matches on Subject: below --
2016-11-22 23:56 [PATCH u-boot 0/5] Aspeed I2C driver, using Driver Model maxims
2016-11-22 23:56 ` [PATCH u-boot 4/5] aspeed: Added function to configure pins for I2C devices maxims
2016-11-23 16:13   ` [U-Boot] " Simon Glass
2016-11-23 16:24     ` Simon Glass
2016-11-23 18:06       ` Maxim Sloyko

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