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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: linux-acpi@vger.kernel.org, "Rafael J. Wysocki" <rjw@rjwysocki.net>
Subject: Re: [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA
Date: Thu, 17 Nov 2016 12:39:21 +0200	[thread overview]
Message-ID: <1479379161.22212.2.camel@linux.intel.com> (raw)
In-Reply-To: <20161108135742.GY1447@lahna.fi.intel.com>

On Tue, 2016-11-08 at 15:57 +0200, Mika Westerberg wrote:
> On Tue, Nov 08, 2016 at 03:46:38PM +0200, Andy Shevchenko wrote:
> > Right now the DMA support of hard LLP is fused. Enable it via
> > specific message
> > sent to SoC at run time.
> 
> It would help the reviewer if you explain what hard LLP actually means
> ;-)

Rafael, shall I fix commit message and resend?

> 
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> 
> I tested this on Minnowboard MAX using SPI and DMA still works fine
> even
> if using larger (>4k) blocks.
> 
> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Thanks!

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

  reply	other threads:[~2016-11-17 10:39 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-08 13:46 [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA Andy Shevchenko
2016-11-08 13:57 ` Mika Westerberg
2016-11-17 10:39   ` Andy Shevchenko [this message]
2016-11-17 13:39     ` Rafael J. Wysocki

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