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From: <gregkh@linuxfoundation.org>
To: danielj@mellanox.com, dledford@redhat.com,
	gregkh@linuxfoundation.org, leon@kernel.org, maorg@mellanox.com
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "IB/mlx5: Use cache line size to select CQE stride" has been added to the 4.8-stable tree
Date: Mon, 21 Nov 2016 17:29:33 +0100	[thread overview]
Message-ID: <147974577313126@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    IB/mlx5: Use cache line size to select CQE stride

to the 4.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     ib-mlx5-use-cache-line-size-to-select-cqe-stride.patch
and it can be found in the queue-4.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 16b0e0695a73b68d8ca40288c8f9614ef208917b Mon Sep 17 00:00:00 2001
From: Daniel Jurgens <danielj@mellanox.com>
Date: Thu, 27 Oct 2016 16:36:41 +0300
Subject: IB/mlx5: Use cache line size to select CQE stride

From: Daniel Jurgens <danielj@mellanox.com>

commit 16b0e0695a73b68d8ca40288c8f9614ef208917b upstream.

When creating kernel CQs use 128B CQE stride if the
cache line size is 128B, 64B otherwise.  This prevents
multiple CQEs from residing in a 128B cache line,
which can cause retries when there are concurrent
read and writes in one cache line.

Tested with IPoIB on PPC64, saw ~5% throughput
improvement.

Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Daniel Jurgens <danielj@mellanox.com>
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/infiniband/hw/mlx5/cq.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/drivers/infiniband/hw/mlx5/cq.c
+++ b/drivers/infiniband/hw/mlx5/cq.c
@@ -917,8 +917,7 @@ struct ib_cq *mlx5_ib_create_cq(struct i
 		if (err)
 			goto err_create;
 	} else {
-		/* for now choose 64 bytes till we have a proper interface */
-		cqe_size = 64;
+		cqe_size = cache_line_size() == 128 ? 128 : 64;
 		err = create_cq_kernel(dev, cq, entries, cqe_size, &cqb,
 				       &index, &inlen);
 		if (err)


Patches currently in stable-queue which might be from danielj@mellanox.com are

queue-4.8/ib-mlx5-use-cache-line-size-to-select-cqe-stride.patch
queue-4.8/ib-mlx4-check-gid_index-return-value.patch
queue-4.8/ib-mlx4-fix-create-cq-error-flow.patch

                 reply	other threads:[~2016-11-21 16:31 UTC|newest]

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