From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Alexander Stein <alexander.stein@systec-electronic.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Wolfram Sang <wsa@the-dreams.de>
Cc: linux-i2c@vger.kernel.org
Subject: Re: [PATCH 1/1] i2c: designware: Consolidate default functionality bits
Date: Wed, 23 Nov 2016 18:12:35 +0200 [thread overview]
Message-ID: <1479917555.20074.7.camel@linux.intel.com> (raw)
In-Reply-To: <67a95b37-73e3-7105-d9d1-7bc60c8b6fcc@linux.intel.com>
On Wed, 2016-11-23 at 16:16 +0200, Jarkko Nikula wrote:
> On 21.11.2016 12:43, Alexander Stein wrote:
> > Use a common place for default functionality bits for both platform
> > and pci driver.
> >
> > Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.co
> > m>
> > ---
> > This patch requires commit c3ae106050b9 ("i2c: designware: Implement
> > support
> > for SMBus block read and write") which is included in current
> > i2c/for-next
> > branch.
> > BTW: Do merrifield and medfield actually not support 10bit
> > addressing?
> >
>
> Andy, do you know?
Merrifield TRM: "Both 7-bit and 10-bit addressing modes are supported."
Same in Medfield TRM.
So, feel free to use this reference to apply a corresponding change. I
will Ack it.
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
next prev parent reply other threads:[~2016-11-23 16:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-21 10:43 [PATCH 1/1] i2c: designware: Consolidate default functionality bits Alexander Stein
2016-11-23 14:16 ` Jarkko Nikula
2016-11-23 16:12 ` Andy Shevchenko [this message]
2016-11-29 19:20 ` Wolfram Sang
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