diff for duplicates of <1480003098.20074.18.camel@linux.intel.com> diff --git a/a/1.txt b/N1/1.txt index ce2d2d3..c2bff6a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ -On Thu, 2016-11-24@17:52 +0200, Andy Shevchenko wrote: -> On Thu, 2016-11-24@18:04 +0300, Eugeniy Paltsev wrote: +On Thu, 2016-11-24 at 17:52 +0200, Andy Shevchenko wrote: +> On Thu, 2016-11-24 at 18:04 +0300, Eugeniy Paltsev wrote: > > Several versions of DW DMAC have multi block transfers hardware > > support. Hardware support of multi block transfers is disabled > > by default if we use DT to configure DMAC and software emulation @@ -19,13 +19,13 @@ On Thu, 2016-11-24@17:52 +0200, Andy Shevchenko wrote: > > Another one is minor listed below, otherwise > -> Acked-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> +> Acked-by: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> > > @@ -152,6 +154,11 @@ dw_dma_parse_dt(struct platform_device *pdev) -> > ? pdata->data_width[tmp] = BIT(arr[tmp] & +> > pdata->data_width[tmp] = BIT(arr[tmp] & > > 0x07); -> > ? } -> > ? +> > } +> > > > + if (!of_property_read_u32_array(np, "multi-block", chan, > > nr_channels)) { > > + for (tmp = 0; tmp < nr_channels; tmp++) @@ -38,5 +38,9 @@ property, keep a default to "supported". Otherwise you will break old (working) DTBs. -- -Andy Shevchenko <andriy.shevchenko at linux.intel.com> +Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> Intel Finland Oy +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index ba4324b..ba06e50 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,14 +1,26 @@ "ref\01479999878-19120-1-git-send-email-Eugeniy.Paltsev@synopsys.com\0" "ref\01479999878-19120-3-git-send-email-Eugeniy.Paltsev@synopsys.com\0" "ref\01480002728.20074.15.camel@linux.intel.com\0" - "From\0andriy.shevchenko@linux.intel.com (Andy Shevchenko)\0" - "Subject\0[PATCH v5 2/2] DW DMAC: add multi-block property to device tree\0" + "ref\01480002728.20074.15.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org\0" + "From\0Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0" + "Subject\0Re: [PATCH v5 2/2] DW DMAC: add multi-block property to device tree\0" "Date\0Thu, 24 Nov 2016 17:58:18 +0200\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0Eugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>" + " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "Cc\0robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" + mark.rutland-5wv7dgnIgG8@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org + dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + arnd-r2nGTMty4D4@public.gmane.org + linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + vireshk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org + shiraz.linux.kernel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org + " christian.ruppert-Yycd8EPnGM5BDgjK7y7TUQ@public.gmane.org\0" "\00:1\0" "b\0" - "On Thu, 2016-11-24@17:52 +0200, Andy Shevchenko wrote:\n" - "> On Thu, 2016-11-24@18:04 +0300, Eugeniy Paltsev wrote:\n" + "On Thu, 2016-11-24 at 17:52 +0200, Andy Shevchenko wrote:\n" + "> On Thu, 2016-11-24 at 18:04 +0300, Eugeniy Paltsev wrote:\n" "> > Several versions of DW DMAC have multi block transfers hardware\n" "> > support. Hardware support of multi block transfers is disabled\n" "> > by default if we use DT to configure DMAC and software emulation\n" @@ -28,13 +40,13 @@ "> \n" "> Another one is minor listed below, otherwise\n" "> \n" - "> Acked-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "> Acked-by: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n" "\n" "> > @@ -152,6 +154,11 @@ dw_dma_parse_dt(struct platform_device *pdev)\n" - "> > ?\t\t\tpdata->data_width[tmp] = BIT(arr[tmp] &\n" + "> > \302\240\t\t\tpdata->data_width[tmp] = BIT(arr[tmp] &\n" "> > 0x07);\n" - "> > ?\t}\n" - "> > ?\n" + "> > \302\240\t}\n" + "> > \302\240\n" "> > +\tif (!of_property_read_u32_array(np, \"multi-block\", chan,\n" "> > nr_channels)) {\n" "> > +\t\tfor (tmp = 0; tmp < nr_channels; tmp++)\n" @@ -47,7 +59,11 @@ "(working) DTBs.\n" "\n" "-- \n" - "Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" - Intel Finland Oy + "Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n" + "Intel Finland Oy\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -1953dcf9b229f2fb80e8c031cfc10a5fc6155bb2e69c2bfdac7b13e7ef73246d +eb0dee70b08843cce1524a3a4b206af6201c76487337007303dc8edfa96a14ea
diff --git a/a/1.txt b/N2/1.txt index ce2d2d3..d30b03e 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,5 +1,5 @@ -On Thu, 2016-11-24@17:52 +0200, Andy Shevchenko wrote: -> On Thu, 2016-11-24@18:04 +0300, Eugeniy Paltsev wrote: +On Thu, 2016-11-24 at 17:52 +0200, Andy Shevchenko wrote: +> On Thu, 2016-11-24 at 18:04 +0300, Eugeniy Paltsev wrote: > > Several versions of DW DMAC have multi block transfers hardware > > support. Hardware support of multi block transfers is disabled > > by default if we use DT to configure DMAC and software emulation @@ -19,13 +19,13 @@ On Thu, 2016-11-24@17:52 +0200, Andy Shevchenko wrote: > > Another one is minor listed below, otherwise > -> Acked-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> +> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > @@ -152,6 +154,11 @@ dw_dma_parse_dt(struct platform_device *pdev) -> > ? pdata->data_width[tmp] = BIT(arr[tmp] & +> > pdata->data_width[tmp] = BIT(arr[tmp] & > > 0x07); -> > ? } -> > ? +> > } +> > > > + if (!of_property_read_u32_array(np, "multi-block", chan, > > nr_channels)) { > > + for (tmp = 0; tmp < nr_channels; tmp++) @@ -38,5 +38,5 @@ property, keep a default to "supported". Otherwise you will break old (working) DTBs. -- -Andy Shevchenko <andriy.shevchenko at linux.intel.com> +Andy Shevchenko <andriy.shevchenko@linux.intel.com> Intel Finland Oy diff --git a/a/content_digest b/N2/content_digest index ba4324b..2ec8e9a 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,14 +1,25 @@ "ref\01479999878-19120-1-git-send-email-Eugeniy.Paltsev@synopsys.com\0" "ref\01479999878-19120-3-git-send-email-Eugeniy.Paltsev@synopsys.com\0" "ref\01480002728.20074.15.camel@linux.intel.com\0" - "From\0andriy.shevchenko@linux.intel.com (Andy Shevchenko)\0" - "Subject\0[PATCH v5 2/2] DW DMAC: add multi-block property to device tree\0" + "From\0Andy Shevchenko <andriy.shevchenko@linux.intel.com>\0" + "Subject\0Re: [PATCH v5 2/2] DW DMAC: add multi-block property to device tree\0" "Date\0Thu, 24 Nov 2016 17:58:18 +0200\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>" + " devicetree@vger.kernel.org\0" + "Cc\0robh+dt@kernel.org" + mark.rutland@arm.com + linux-kernel@vger.kernel.org + vinod.koul@intel.com + dmaengine@vger.kernel.org + arnd@arndb.de + linux-snps-arc@lists.infradead.org + vireshk@kernel.org + shiraz.linux.kernel@gmail.com + " christian.ruppert@alitech.com\0" "\00:1\0" "b\0" - "On Thu, 2016-11-24@17:52 +0200, Andy Shevchenko wrote:\n" - "> On Thu, 2016-11-24@18:04 +0300, Eugeniy Paltsev wrote:\n" + "On Thu, 2016-11-24 at 17:52 +0200, Andy Shevchenko wrote:\n" + "> On Thu, 2016-11-24 at 18:04 +0300, Eugeniy Paltsev wrote:\n" "> > Several versions of DW DMAC have multi block transfers hardware\n" "> > support. Hardware support of multi block transfers is disabled\n" "> > by default if we use DT to configure DMAC and software emulation\n" @@ -28,13 +39,13 @@ "> \n" "> Another one is minor listed below, otherwise\n" "> \n" - "> Acked-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" "\n" "> > @@ -152,6 +154,11 @@ dw_dma_parse_dt(struct platform_device *pdev)\n" - "> > ?\t\t\tpdata->data_width[tmp] = BIT(arr[tmp] &\n" + "> > \302\240\t\t\tpdata->data_width[tmp] = BIT(arr[tmp] &\n" "> > 0x07);\n" - "> > ?\t}\n" - "> > ?\n" + "> > \302\240\t}\n" + "> > \302\240\n" "> > +\tif (!of_property_read_u32_array(np, \"multi-block\", chan,\n" "> > nr_channels)) {\n" "> > +\t\tfor (tmp = 0; tmp < nr_channels; tmp++)\n" @@ -47,7 +58,7 @@ "(working) DTBs.\n" "\n" "-- \n" - "Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" Intel Finland Oy -1953dcf9b229f2fb80e8c031cfc10a5fc6155bb2e69c2bfdac7b13e7ef73246d +fd5a8739fbc79e356443b30e5eeb7773c70fc8b360c57f3d868ad52332d45f6a
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