Re: xf 4.0.1 + ati driver with rage II/rage pro

[R Shapiro <rshapiro@bbn.com>]

Michael Schmitz writes:
 > > I tried miBoot.  Is that equivalent from the X perspective?
 >
 > Show me your lspci -vv log :-)

The result in miBoot is the same as in BootX:

00:00.0 Host bridge: Motorola Computer Group MPC106 [Grackle] (rev 40)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort+ <TAbort- <MAbort+ >SERR- <PERR-
	Latency: 0 set, cache line size 08

00:0d.0 VGA compatible controller: ATI Technologies Inc 215GI [Mach64 GI] (rev 5c)
	Subsystem: Unknown device 1002:0000
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 8 min, 32 set, cache line size 08
	Interrupt: pin A routed to IRQ 23
	Region 0: Memory at 84000000 (32-bit, prefetchable)
	Region 1: I/O ports at 0400 [disabled]
	Region 2: Memory at 81801000 (32-bit, non-prefetchable)

00:0f.0 VGA compatible controller: ATI Technologies Inc 215GI [Mach64 GI] (rev 5c)
	Subsystem: Unknown device 1002:0000
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 8 min, 32 set, cache line size 08
	Interrupt: pin A routed to IRQ 25
	Region 0: Memory at 83000000 (32-bit, prefetchable)
	Region 1: I/O ports at 0400 [disabled]
	Region 2: Memory at 81800000 (32-bit, non-prefetchable)

00:10.0 Class ff00: Apple Computer Inc. Heathrow Mac I/O (rev 01)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 32 set, cache line size 08
	Region 0: Memory at f3000000 (32-bit, non-prefetchable)

00:12.0 VGA compatible controller: ATI Technologies Inc 215GT [Mach64 GT] (rev 9a)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 8 min, 32 set, cache line size 08
	Interrupt: pin A routed to IRQ 22
	Region 0: Memory at 82000000 (32-bit, non-prefetchable)
	Region 1: I/O ports at 0400 [disabled]




 > Re: OF device tree, there's a tool named lsprop you need to run on
 > /proc/device_tree (see Paul's or BenH's pages for the source or ask me
 > for a copy).

Monday...

--
rshapiro@bbn.com


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