From mboxrd@z Thu Jan 1 00:00:00 1970 From: bgolaszewski@baylibre.com (Bartosz Golaszewski) Date: Wed, 7 Dec 2016 11:42:45 +0100 Subject: [PATCH v5 4/4] ARM: dts: da850: specify the maximum pixel clock rate for tilcdc In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com> References: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com> Message-ID: <1481107365-24839-5-git-send-email-bgolaszewski@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org At maximum CPU frequency of 300 MHz the maximum pixel clock frequency is 37.5 MHz[1]. We must filter out any mode for which the calculated pixel clock rate would exceed this value. Specify the max-pixelclock property for the display node for da850-lcdk. [1] http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_(LCDC)_Throughput_and_Optimization_Techniques Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 3f51e59..ba5bf80 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -452,6 +452,7 @@ compatible = "ti,da850-tilcdc"; reg = <0x213000 0x1000>; interrupts = <52>; + max-pixelclock = <37500>; status = "disabled"; }; }; -- 2.9.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartosz Golaszewski Subject: [PATCH v5 4/4] ARM: dts: da850: specify the maximum pixel clock rate for tilcdc Date: Wed, 7 Dec 2016 11:42:45 +0100 Message-ID: <1481107365-24839-5-git-send-email-bgolaszewski@baylibre.com> References: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Jyri Sarha , Tomi Valkeinen , David Airlie , Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Laurent Pinchart , Peter Ujfalusi , Russell King Cc: linux-devicetree , linux-drm , LKML , arm-soc , Bartosz Golaszewski List-Id: devicetree@vger.kernel.org QXQgbWF4aW11bSBDUFUgZnJlcXVlbmN5IG9mIDMwMCBNSHogdGhlIG1heGltdW0gcGl4ZWwgY2xv Y2sgZnJlcXVlbmN5CmlzIDM3LjUgTUh6WzFdLiBXZSBtdXN0IGZpbHRlciBvdXQgYW55IG1vZGUg Zm9yIHdoaWNoIHRoZSBjYWxjdWxhdGVkCnBpeGVsIGNsb2NrIHJhdGUgd291bGQgZXhjZWVkIHRo aXMgdmFsdWUuCgpTcGVjaWZ5IHRoZSBtYXgtcGl4ZWxjbG9jayBwcm9wZXJ0eSBmb3IgdGhlIGRp c3BsYXkgbm9kZSBmb3IKZGE4NTAtbGNkay4KClsxXSBodHRwOi8vcHJvY2Vzc29ycy53aWtpLnRp LmNvbS9pbmRleC5waHAvT01BUC1MMXgvQzY3NHgvQU0xeF9MQ0RfQ29udHJvbGxlcl8oTENEQylf VGhyb3VnaHB1dF9hbmRfT3B0aW1pemF0aW9uX1RlY2huaXF1ZXMKClNpZ25lZC1vZmYtYnk6IEJh cnRvc3ogR29sYXN6ZXdza2kgPGJnb2xhc3pld3NraUBiYXlsaWJyZS5jb20+Ci0tLQogYXJjaC9h cm0vYm9vdC9kdHMvZGE4NTAuZHRzaSB8IDEgKwogMSBmaWxlIGNoYW5nZWQsIDEgaW5zZXJ0aW9u KCspCgpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vYm9vdC9kdHMvZGE4NTAuZHRzaSBiL2FyY2gvYXJt L2Jvb3QvZHRzL2RhODUwLmR0c2kKaW5kZXggM2Y1MWU1OS4uYmE1YmY4MCAxMDA2NDQKLS0tIGEv YXJjaC9hcm0vYm9vdC9kdHMvZGE4NTAuZHRzaQorKysgYi9hcmNoL2FybS9ib290L2R0cy9kYTg1 MC5kdHNpCkBAIC00NTIsNiArNDUyLDcgQEAKIAkJCWNvbXBhdGlibGUgPSAidGksZGE4NTAtdGls Y2RjIjsKIAkJCXJlZyA9IDwweDIxMzAwMCAweDEwMDA+OwogCQkJaW50ZXJydXB0cyA9IDw1Mj47 CisJCQltYXgtcGl4ZWxjbG9jayA9IDwzNzUwMD47CiAJCQlzdGF0dXMgPSAiZGlzYWJsZWQiOwog CQl9OwogCX07Ci0tIAoyLjkuMwoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRl c2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v ZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932300AbcLGKnQ (ORCPT ); Wed, 7 Dec 2016 05:43:16 -0500 Received: from mail-wj0-f177.google.com ([209.85.210.177]:35213 "EHLO mail-wj0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932228AbcLGKnH (ORCPT ); Wed, 7 Dec 2016 05:43:07 -0500 From: Bartosz Golaszewski To: Jyri Sarha , Tomi Valkeinen , David Airlie , Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Laurent Pinchart , Peter Ujfalusi , Russell King Cc: LKML , arm-soc , linux-drm , linux-devicetree , Bartosz Golaszewski Subject: [PATCH v5 4/4] ARM: dts: da850: specify the maximum pixel clock rate for tilcdc Date: Wed, 7 Dec 2016 11:42:45 +0100 Message-Id: <1481107365-24839-5-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com> References: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org At maximum CPU frequency of 300 MHz the maximum pixel clock frequency is 37.5 MHz[1]. We must filter out any mode for which the calculated pixel clock rate would exceed this value. Specify the max-pixelclock property for the display node for da850-lcdk. [1] http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_(LCDC)_Throughput_and_Optimization_Techniques Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 3f51e59..ba5bf80 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -452,6 +452,7 @@ compatible = "ti,da850-tilcdc"; reg = <0x213000 0x1000>; interrupts = <52>; + max-pixelclock = <37500>; status = "disabled"; }; }; -- 2.9.3